Power per unit junction area: Calculated for MOSFETs to quantify the maximum allowable power per unit gate area that can be applied across the gate. This specifies the threshold for electrostatic discharge failure. This is an entry field. The range for this field is 0 to 10,000 watts per square meter. For example, assuming V_G is the typical dielectric breakdown voltage 20v, V_G = V_1H = 5.5V for two typical transistors at 54 AC 11074 and 74 AC 11074. Assuming I_input = ± 1mA and typical gate dimensions of gate length (L) = 7mm and gate width (W) = 20mm, the power dissipated area is calculated with the formula:
 

  = 39.28 x 10³ Watt/m²

 
Bond pad pitch: The distance, in mils, between the centerlines of adjacent bond pads. This is an entry field. The range for this field is 0 to 80 mils.

Bond pad length: The length, in mils, of the bond pad on the chip. This is an entry field. The range for this field is 0 to 80 mils.

Bond pad thickness: The thickness, in mils, of the bond pad on the chip. This is an entry field. The range for this field is 0 to 80 mils.

Bond pad width: The width, in mils, of the bond pad on the chip. This is an entry field. The range for this field is 0 to 80 mils.

High output voltage: Voltage value for the digital device output which will trigger the next logic device to a logic state 1. This is an entry field. The range for this field is .00001 to 10 volts.

Low output voltage: Voltage value for the digital device output which will trigger the next logic device to a logic state 0. This is an entry field. The range for this field is .00001 to 10 volts.

High input voltage: Voltage value for the digital device input which will trigger the logic device to a logic state 1. This is an entry field. The range for this field is .00001 to 10 volts.

Low input voltage: Voltage value for the digital device input which will trigger the logic device to a logic state 0. This is an entry field. The range for this field is .00001 to 10 volts.

Clock frequency: The number of instructions that can be given per second. This is an entry field. The range for this field is .00001 to 200 MHz. For a classical RC low-pass filter, the rise time (t_rise), clock frequency (F_clock), and the bandwidth are related by the following

 
Bandwidth: The concept of bandwidth comes from low-pass RC filter theory. The low-pass RC filter passes low frequencies readily, but attenuates the high frequencies. For the RC filter the bandwidth is given by

where R and C are the resistance and capacitance of the interconnect element.

Bandwidth is also defined as the frequency at which the gain of the filter falls to -3 dB of the low frequency value (70%). This concept is applied to interconnects such as wirebonds which act as low-pass filters. The bandwidth for wirebonds is given by:

where T_ro is the output rise time and T_ri is the input rise time. This is an entry field. The range for this field is 1.00E-05 to 1.00E+05 MHz.

Number of I/O: The number of inputs and outputs the semiconductor has. This is an entry field. The range for this field is 0 to 1,000 I/Os.

Worst case current density: The maximum allowable current density for a metal system. Typically expressed in A/cm², range 1.00E-05 to 1.00E+10.

Maximum Junction temperature: The maximum temperature, in degrees Celsius, at the semiconductor-interconnect or chip-package/substrate junction. This is an entry field. The range is 0 to 200°C.
 

For clarification of the following geometrical terms it may be helpful to consult the figures in Appendix C.
 

Initial vertical crack depth: The maximum crack depth, in mils, that exists along the y-axis of the chip, allowed by the screening process (internal visual inspection). This is an entry field. The range for this field is 0 to 5 mils.

Final vertical crack depth: The crack depth, in mils, at which the crack along the y-axis of the chip causes failure. This is an entry field. The range for this field is 0 to 8 mils.

Initial horizontal crack depth: The depth of the crack, in mils, that exists along the x-axis, allowed by the screening process (internal visual inspection). This is an entry field. The range for this field is 0 to 5 mils.

Final horizontal crack depth: The crack depth, in mils, at which the crack along the x-axis of the chip causes failure. This is an entry field. The range for this field is 0 to 8 mils.

Minimum distance between metal tracks: The minimum distance that can occur between tracks on the chip. This is an entry field. The range is 0 to 5 mils.

Passivation deposition temp.: The temperature, in degrees Celsius, at which a glass passivation layer can be deposited on the semiconductor surface for the purpose of providing electrical stability by isolating the transistor surface from charge contamination. This is an entry field. The range for this field is 100 to 1000 °C.

Gate oxide thickness: The thickness, in angstroms, of the oxide layer thermally grown on the semiconductor surface. Oxide here refers only to oxides used as dielectrics across which an electric field is applied, e.g., gate oxide. This is an entry field. The range for this field is 10 to 10,000 angstroms.

Horizontal elliptic crack length: Maximum surface length of an elliptic crack in the horizontal direction of the chip, allowed by the screening process (internal visual inspection). This is an entry field. The range for this field is 0 to 100 mils.

Horizontal elliptic crack depth: Depth of the elliptic crack in the horizontal direction of the chip. This is an entry field. The range for this field is 0 to 100 mils.

Vertical elliptic crack length: Surface length of an elliptic crack in the vertical direction of the chip, allowed by the screening process (internal visual inspection). This is an entry field. The range for this field is 0 to 100 mils.

Vertical elliptic crack depth: Depth of the elliptic crack in the vertical direction of the chip. This is an entry field. The range for this field is 0 to 100 mils.

Metallization material: The conductive material used for metallization tracks deposited on the semiconductor. This is a picklist field. You can view the material properties of the metallization material by selecting the Properties button. A material properties window appears. The window is defined in the Glossary.

Maximum metal length: The maximum length along the x-axis, in mils, of the metallization film on the semiconductor chip. This is an entry field. The range for this field is 0 to 10 mils.

Minimum metal width: The minimum width along the y-axis, in mils, of the metallization film on the semiconductor chip. This is an entry field. The range for this field is 0 to 4 mils.

Minimum metal thickness: The minimum thickness along the z-axis, in mils, of the metallization film on the semiconductor chip. This is an entry field. The range for this field is 0 to 2 mils.

Maximum crack width: The maximum allowable crack width, in mils, perpendicular to the metallization length that will pass the screening process (internal visual inspection). This is an entry field. The range for this field is 0 to .4 mils.

Grain boundary width: Widths of grain boundaries in die metallizations. Typical value is 1 micron (micrometer). This is an entry field. The range for this field is 0 to .4 mils.

Designed lead capacitance: The amount of capacitance, in picofarads, the lead is designed to have. This is an entry field. The range for this field is 0 to 100 picofarads.

Cost: Cost, in dollars, of the semiconductor. This is an entry field. The range for this field is 0 to 1000 dollars.

The Resistor parameter window contains five fields that are defined exactly as in the Capacitor selection, with exactly the same ranges for their values. They are: Element ID, Element name, Element technology, Element length, Element width, Element thickness, and Comments. The other fields in the Resistor parameter window are defined below:

Resistance: The resistance, in ohms, the resistor offers against electrical current. This is an entry field. The range for this field is 0.00E+00 to 1.00E+20 ohms.

Power: The product of rated voltage and rated current will give the rated power. This is an entry field. The range for this field is 0.00001 to 10 watts.

Gate area - Plan view area of the section of a MOSFET device under the gate electrode through which current passes from source to drain. It is equal to the product of the channel length and the channel width.

Substrate current - The parasitic current which flows from the device through the substrate and out the substrate ground contact.
 

Length of emitter/base junction - One of the two factors which together determine the cross-sectional area of the junction through which current passes from the emitter to the base in a bipolar device. This is the factor for the x-direction. The other factor is the depth of the emitter/base junction.

Depth of emitter base/junction - One of the two factors which together determine the cross-sectional area of the junction through which current passes from the emitter to the base in a bipolar device. This is the factor for the z-direction. The other factor is the length of the emitter/base junction.

Other parameters

Avalanche breakdown voltage - The voltage at which the field across a junction becomes large enough for impact ionization and subsequent avalanche injection of carriers, breaking down the barrier aspects of the junction.

Internal bulk resistance - The resistance of the bulk of the semiconductor into which the device is built.

Thermal breakdown junction energy - Energy level which causes sufficient heat dissipation to raise the temperature of the semiconductor to a degree which allows thermal breakdown of the junction.

Input energy at junction - Actual energy imparted to the junction as a result of power dissipation.

Voltage (drain to source) - the voltage which is applied to a MOSFET to cause current to flow through the channel from source to drain.

Potential drop across junction - The built-in bias across a p-n junction which results from the difference in dopant type and level.

Carrier Concentration - the concentration of free carriers in the semiconductor

Doping Density - the concentration of dopant atoms in the semiconductor

Polywidth - Width of the polysilicon gate electrode

Diffusion length - Weighted average length that free carriers can travel in a semiconductor before recombination. This is a function of the carrier lifetime and mobility.