ECE 271

The IEEE student store has the 26V12 GALs in.

Information about using the test equipment in the lab is available here.

syllabus

Homework #1 and solution

Homework #2 and solution

Homework #3 and solution

Homework #4 and solution

Homework #5

Exam #1 solution

lab #1

lab #2

lab #3

lab #4

ADDITIONAL LECTURE NOTES:

1. high-speed design article
2. Describing FSM in Verilog is here. (The timing diagram is also needed.)
3. You can add signals to the timing diagram by this method.

SUPPORTING MATERIAL:

1. the flip-flop state transition table (available here )
2. Verilog introduction (same as ECE171) is here.
3. Verilog lecture overheads and the timing diagram
4. Describing FSM in Verilog is here.
5. Verilog slides
6. Tutorial on using the Verilog compiler
7. Tutorial on using the PLD programmer

DATASHEETS:

• 74AS74A
• 74HC75
• 54HC160
• 74S174
• 74AS194
• 74AC244
• 74ALS374
• 74AC541
• 74AC573
• 74AS574
• 74AS869
• PAL16L8
• 26V12 (pages 1-6, 9-11, 14)
• 27C64 EPROM
• CY7C185 SRAM
• CY7C277 PROM
• Xilinx FPGA (pages 1-6, 9-11, 13, 67)
• EEPROM datasheet

The TA for this class is Haera Chung. Her email address is hrchung@ece.pdx.edu. Her office hours are Fridays, 0900-1100 in FAB 60-04 (the ECE dept student lounge).

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