William N. N. Hung, Ph.D. [[Activities]] [[Publications]] [[Patents]] [[Links]] [[Blog]] Research Interests: FPGA Synthesis, Formal Verification, Satisfiability, Logic Synthesis VLSI CAD, Nanotechnology, Quantum Computing, and Reversible Logic.

Professional Activities

• Co-Chair of Logic and Circuit Track, Program Committee for the IEEE International Conference on Computer Design (ICCD), 2011, 2012, 2013
• Session Chair, International Conference on Computer Aided Verification (CAV), Hardware Verification Session, 2012
• Session Chair, International Conference on Computer Aided Verification (CAV), Deductive Verification Session, 2011
• Program Committee, International Conference on Computer Aided Verification (CAV), 2011, 2012, and 2013
• Program Committee, Formal Methods in Computer Aided Design (FMCAD), 2013
• Program Committee, International Workshop on Design and Implementation of Formal Tools and Systems (DIFTS), 2013
• Program Committee, 26th IEEE International Conference on VLSI Design (VLSID), 2013
• Program Committee, International Conference on Evolutionary Computation Theory and Applications (ECTA), 2011
• Program Committee, 11th IEEE International Conference on Hybrid Intelligent Systems (HIS), 2011
• Program Committee, IEEE International Conference on Computer Design (ICCD), 2010, 2011, 2012 and 2013
• Program Committee, IEEE/ACM Design Automation and Test in Europe (DATE) 2005, 2006, 2008, 2009 and 2010
• Program Committee, IEEE Congress on Evolutionary Computation (CEC) 2006, 2007, 2008, 2009, 2010, 2011
• Program Committee, 29th IEEE International Computer Software and Applications Conference (COMPSAC) 2005
• Publications Chair, Formal Methods in Computer Aided Design (FMCAD), 2009
• Chair, IEEE CIS Emergent Technologies Technical Committee, Task Force on Quantum Computing, 2011 - 2013
• Vice Chair, IEEE CIS Emergent Technologies Technical Committee, Task Force on Quantum Computing, 2008 - 2011
• Session Chair, IEEE World Congress on Computational Intelligence (WCCI), Special Session on Evolutionary Techniques in Nanotechnology and Quantum Computing, 2008
• Session Chair, ACM/IEEE Design Automation Conference (DAC), CAD for FPGA session, 2006
• Organizing Committee, IEEE World Congress on Computational Intelligence (WCCI), Special Session on Quantum Computing, 2006, 2007, 2008, 2010, 2012
• IEEE CIS Emergent Technologies Technical Committee, Task Force on Quantum Computing, 2004
• IEEE Senior Member
• Reviewer for the following:

  Design Automation Conference (DAC) International Conference on Computer-Aided Design (ICCAD) ACM SIGDA DAC Ph.D. Forum IEEE International Symposium on Circuits and Systems (ISCAS) IEEE Transactions on Computers IEEE Transactions on CAD IEEE Transactions on VLSI Systems IEEE Transactions on Nanotechnology IEEE Transactions on Circuits and Systems ACM Transactions on Design Automation of Electronic Systems (TODAES) University of California MICRO research fund (UC MICRO)

Publications

Journal Publications

1. Yongjian Li, Naiju Zeng, William N. N. Hung, and Xiaoyu Song, "Combining Symmetry Reduction with Generalized Symbolic Trajectory Evaluation", The Computer Journal, Accepted, 2012.
2. Yu Jiang, Hehua Zhang, Xiaoyu Song, William N. N. Hung, Ming Gu and Jiaguang Sun, "Bayesian Network Based Reliability Analysis of PLC Systems", IEEE Transactions on Industrial Electronics, Accepted, 2012.
3. Liangze Yin, Fei He, William N. N. Hung, Xiaoyu Song, and Ming Gu, "Maxterm Covering for Satisfiability", IEEE Transactions on Computers, Volume 61, Number 3, March 2012, pp. 420-426.
4. Zhufei Chu, Yinshui Xia, William N. N. Hung, Xiaoyu Song, and Lunyao Wang, "Timing-driven logic restructuring for nano-hybrid circuits", International Journal of Electronics, Article in press, 2012.
5. Hehua Zhang, Yu Jiang, William N. N. Hung, Guowu Yang, Ming Gu, Jiaguang Sun, "New strategies for reliability analysis of Programmable Logic Controllers", Mathematical and Computer Modelling, Volume 55, Issues 7-8, April 2012, pp. 1916-1931.
6. Yinshui Xia, Zhufei Chu, William N. N. Hung, Lunyao Wang, and Xiaoyu Song, "An Integrated Optimization Approach for Nano-Hybrid Circuit Cell Mapping", IEEE Transactions on Nanotechnology, Volume 10, Issue 6, November 2011, pp. 1275-1284.
7. Yongjian li, William N. N. Hung, Xiaoyu Song, and Naiju Zeng, "Exploring Structural Symmetry Automatically in Symbolic Trajectory Evaluation", Formal Methods in System Design, Volume 39, Number 2, October 2011, pp. 117-143.
8. Yongjian Li, William N. N. Hung, and Xiaoyu Song, "A Novel Formalization of Symbolic Trajectory Evaluation Semantics in Isabelle/HOL", Theoretical Computer Science, Volume 412, Issue 25, June 2011, pp. 2746-2765.
9. Zhiyang You, Xibin Zhao, Hai Wan, William N. N. Hung, Yuke Wang, Ming Gu, "A Novel Fault Diagnosis Mechanism for Wireless Sensor Networks", Mathematical and Computer Modelling, Volume 54, Issues 1-2, July 2011, pp. 330-243.
10. Anping He, William N. N. Hung, Guowu Yang, Jinzhao Wu, and Lian Li, "Mathematical analysis of stage-based programmable logic controller", Computers and Mathematics with Applications, Vol. 61, Issue 7, April 2011, pp. 1769-1785.
11. Guowu Yang, Fei Xie, William N. N. Hung, Xiaoyu Song, and Marek Perkowski, "Realization and Synthesis of Reversible Functions", Theoretical Computer Science, Vol. 412, Issue 17, April 2011, pp. 1606-1613.
12. Fei He, Xiaoyu Song, William N. N. Hung, Ming Gu, and Jiaguang Sun, "Integrating Evolutionary Computation with Abstraction Refinement for Model Checking", IEEE Transactions on Computers, Vol. 59, No. 1, January 2010, pp. 116-126.
13. Guowu Yang, William N. N. Hung, Xiaoyu Song, and Marek Perkowski, "Exact Synthesis of 3-qubit Quantum Circuits from Non-binary Quantum Gates", International Journal of Electronics, Vol. 97, No. 4, April 2010, pp. 475-489.
14. Guowu Yang, Xiaoyu Song, William N. N. Hung, Marek Perkowski, and Chang-Jun Seo, "Synthesis of Reversible Circuits with Minimal Costs", Calcolo, Vol. 45, No. 3, September 2008, pp. 193-206.
15. Guowu Yang, Xiaoyu Song, Marek Perkowski, William N. N. Hung, and Chang-Jun Seo, "Minimal Universal Library for nxn Reversible Circuits", Computers and Mathematics with Applications, Vol. 56, No. 1, July 2008, pp. 160-165.
16. William N. N. Hung, Changjian Gao, Xiaoyu Song, and Dan Hammerstrom, " Defect Tolerant CMOL Cell Assignment via Satisfiability", IEEE Sensors Journal, Vol. 8, No. 6, June 2008, pp. 823-830.
17. Lerong Cheng, Xiaoyu Song, Guowu Yang, William N. N. Hung, Zhiwei Tang and Shaodi Gao, "A Fast Congestion Estimator for Routing with Bounded Detours", Integration: the VLSI Journal, Vol. 41, No. 3, May 2008, pp. 360-370.
18. Guowu Yang, Xiaoyu Song, William N. N. Hung, and Marek A. Perkowski, "Bi-directional Synthesis of 4-bit Reversible Circuits", The Computer Journal, Vol. 51, No. 2, March 2008, pp. 207-215.
19. Fei He, William N. N. Hung, Xiaoyu Song, Ming Gu, and Jianguang Sun, "A satisfiability formulation for FPGA routing with pin rearrangements", International Journal of Electronics, Vol. 94, No. 9, September 2007, pp. 857-868.
20. Guowu Yang, Xiaoyu Song, Marek A. Perkowski, William N. N. Hung, Jacob Biamonte and Zhiwei Tang, "Four-level realization of 3-qubit reversible functions", IET Computers and Digital Techniques, Vol. 1, No. 4, July 2007, pp. 382-388.
21. William N. N. Hung et al, "Optimal Synthesis of Multiple Output Boolean Functions using a Set of Quantum Gates by Symbolic Reachability Analysis", IEEE Transactions on Computer-Aided Design, Vol. 25, No. 9, September 2006, pp. 1652-1663.
22. Fei He, Xiaoyu Song, Ming Gu, Guowu Yang, William N. N. Hung and Jiaguang Sun, "Probabilistic Optimization for FPGA Board Level Routing Problems", IEEE Transactions on Circuits and Systems II, Vol. 53, No. 4, April 2006, pp. 264-268.
23. Guowu Yang, William N. N. Hung et al, "Majority-Based Reversible Logic Gates", Theoretical Computer Science, Vol. 334, No. 1-3, April 2005, pp. 259-274.
24. William N. N. Hung et al, "Routability Checking for Three-Dimensional Architectures", IEEE Transactions on VLSI Systems, Vol. 12, No. 12, December 2004, pp. 1398-1401.
25. Lerong Cheng, William N. N. Hung et al, "Congestion Estimation for 3D Circuit Architectures", IEEE Transactions on Circuits and Systems II, Vol. 51, No. 12, December 2004, pp. 655-659.
26. William N. N. Hung et al, "Segmented Channel Routability via Satisfiability", ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 9, No. 4, October 2004, pp. 517-528.
27. Ming Gu, Fei He, William N. N. Hung, and Xiaoyu Song, "A Comparative Study on Search Strategies for Cell Assignments", International Journal of Computer Mathematics, Vol. 81, No. 7, July 2004, pp. 901-908.
28. Xiaoyu Song, William N. N. Hung et al., "Board-level Multi-Terminal Net Assignment for the Partial Crossbar Architecture", IEEE Transactions on VLSI Systems, Vol. 11, No. 3, June 2003, pp. 511-514.
29. William N. N. Hung et al., "BDD Minimization by Scatter Search", IEEE Transactions on Computer-Aided Design, Vol. 21, No. 8, August 2002, pp. 974-979.

Conference Publications

30. Hui Kong, Fei He, Xiaoyu Song, William N. N. Hung and Ming Gu, "Exponential-Condition-Based Barrier Certificate Generation for Safety Verification of Hybrid Systems", International Conference on Computer Aided Verification (CAV), Saint Petersburg, Russia, July 2013.
31. Hehua Zhang, Yu Jiang, William N. N. Hung, Xiaoyu Song, and Jiaguang Sun, "Sequential Dependency and Reliability Analysis of Embedded Systemi", IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, January 2013.
32. Yu Jiang, Hehua Zhang, Xun Jiao, Xiaoyu Song, William N. N. Hung, Ming Gu, and Jiaguang Sun, "Uncertain Model and Algorithm for Hardware/Software Partitioning", IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Amherst, Massachusetts, USA, August 2012.
33. Wensheng Guo, Guowu Yang, Qianqi Le and William N. N. Hung, "Complete SAT Solver Based on Set Theory", International Conference on Information Computing and Applications (ICICA), Chengde, China, September 2012.
34. Qianqi Le, Guowu Yang, William N. N. Hung and Wensheng Guo, "Reliable NoC Mapping Based on Scatter Search", International Conference on Information Computing and Applications (ICICA), Chengde, China, September 2012.
35. Hehua Zhang, Yu Jiang, Xun Jiao, Xiaoyu Song, William N. N. Hung and Ming Gu, "Reliability Analysis of PLC Systems by Bayesian Network", IEEE Sixth International Conference on Software Security and Reliability (SERE), Washington, D.C., June 2012.
36. Yongjian Li, Naiju Zeng, William N. N. Hung and Xiaoyu Song, "Combining Theorem Proving and Symbolic Trajectory Evaluation in THM&STE", Haifa Verification Conference (HVC), Haifa, Israel, December 2011.
37. Yongjian Li, Naiju Zeng, William N. N. Hung and Xiaoyu Song, "Enhanced Symbolic Simulation of a Round-robin Arbiter", IEEE International Conference on Computer Design (ICCD), Amherst, Massachusetts, October 2011.
38. Hehua Zhang, Yu Jiang, William N. N. Hung, Xiaoyu Song and Ming Gu, "Domain-driven Probabilistic Analysis of Programmable Logic Controllers", 13th International Conference on Formal Engineering Methods (ICFEM), Durham, United Kingdom, October 2011.
39. Zhufei Chu, Yinshui Xia, William N. N. Hung, Lunyao Wang, and Xiaoyu Song, "A Memetic Approach for Nanoscale Hybrid Circuit Cell Mapping", 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD), Lille, France, September 2010.
40. Fei He, He Zhu, William N. N. Hung, Xiaoyu Song, and Ming Gu, "Compositional Abstraction Refinement for Timed Systems", IEEE International Symposium on Theoretical Aspects of Software Engineering (TASE), Taiwan, August 2010.
41. Yongjian Li, William N. N. Hung, and Xiaoyu Song, "Automatically Exploring Structural Symmetry in Symbolic Trajectory Evaluation", Hardware Verification Workshop (HWVW), Edinburgh, United Kingdom, July 2010.
42. Guowu Yang, William N. N. Hung, Xiaoyu Song and Marek Perkowski, "Synthesizing Hybrid Quantum Circuits without Ancilla Qudits", IEEE Congress on Evolutionary Computation (CEC), Barcelona, Spain, July 2010.
43. Yinshui Xia, Zhufei Chu, William N. N. Hung, Lunyao Wang, and Xiaoyu Song, "CMOL cell assignment by genetic algorithm", 8th IEEE International NEWCAS Conference (NEWCAS), Montreal, Quebec, Canada, June 2010.
44. He Zhu, Fei He, William N. N. Hung, Xiaoyu Song and Ming Gu, "Data Mining based Decomposition for Assume-Guarantee Reasoning", Formal Methods in Computer Aided Design (FMCAD), Austin, Texas, November 2009, pp. 116-119.
45. Xiaojun Lu, Guowu Yang, Jianping Li, Xiaoyu Song, and William N. N. Hung, "The Probability Logics for Nanoscale Inverters Cascade", IEEE Congress on Evolutionary Computation (CEC), Hong Kong, China, June 2008.
46. William N. N. Hung, Changjian Gao, Xiaoyu Song, and Dan Hammerstrom, "Defect Tolerant CMOL Cell Assignment via Satisfiability", Nanoelectronic Devices for Defense and Security (NANO-DDS), Crystal City, Virginia, June 2007.
47. Guowu Yang, Fei Xie, Xiaoyu Song, William N. N. Hung, and Marek Perkowski, "A Constructive Algorithm for Reversible Logic Synthesis", IEEE Congress on Evolutionary Computation (CEC), Vancouver, Canada, July 2006.
48. Guowu Yang, Xiaoyu Song, William N. N. Hung, Fei Xie and Marek Perkowski, "Group Theory Based Synthesis of Binary Reversible Circuits", Theory and Applications of Models of Computation (TAMC), Beijing, China, May 2006.
49. Fei He, William N. N. Hung, Xiaoyu Song, Ming Gu, and Jiaguang Sun, "Segmented Channel Routing with Pin Rearrangements via Satisfiability", IEEE International Symposium on Circuits and Systems (ISCAS), pp. 6248-6251, Kobe, Japan, May 2005.
50. Guowu Yang, Xiaoyu Song, William N. N. Hung, and Marek Perkowski, "Bi-direction Synthesis for Reversible Circuits", IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Tempa, Florida, May 2005.
51. Guowu Yang, Xiaoyu Song, William N. N. Hung, and Marek Perkowski, "On Realization of 3-qubit Reversible Circuits with the minimum number of non-linear gates", 7th International Symposium on Representations and Methodology of Future Computing Technologies (RM2005), Tokyo, Japan, September 2005.
52. Guowu Yang, Xiaoyu Song, Marek Perkowski, and William N. N. Hung, "Minimal Universal Library for nxn Reversible Circuits", 7th International Symposium on Representations and Methodology of Future Comp uting Technologies (RM2005), Tokyo, Japan, September 2005.
53. Guowu Yang, William N. N. Hung, Xiaoyu Song and Marek Perkowski, "Exact Synthesis of 3-qubit Quantum Circuits from Non-binary Quantum Gates Using Multiple-Valued Logic", IEEE/ACM Design Automation and Test in Europe (DATE), Munich, Germany, March 2005.
54. Guowu Yang, Xiaoyu Song, William N. N. Hung and Marek Perkowski, "Fast Synthesis of Exact Minimal Reversible Circuits using Group Theory", IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), January 2005.
55. Guowu Yang, Jin Yang, William N. N. Hung and Xiaoyu Song, "Implication of Assertion Graphs in GSTE", IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), January 2005.
56. William N. N. Hung and Naren Narasimhan, "Reference Model Based RTL Verification: An Integrated Approach", 9th IEEE International High Level Design Validation and Test Workshop (HLDVT), Sonoma, California, November 2004.
57. William N. N. Hung, Xiaoyu Song, Guowu Yang, Jin Yang and Marek Perkowski, "Quantum Logic Synthesis by Symbolic Reachability Analysis", 41st ACM/IEEE Design Automation Conference (DAC), San Diego, California, June 2004.
58. Lerong Cheng, William N. N. Hung, Guowu Yang and Xiaoyu Song, "Congestion Estimation for 3D Routing", IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Lafayette, Lousiana, February 2004.
59. Guowu Yang, William N. N. Hung, Xiaoyu Song and Marek Perkowski, "Majority-Based Reversible Logic Gate", 6th International Symposium on Representations and Methodology of Future Computing Technologies (RM2003), Trier, Germany, March 2003.
60. William N. N. Hung, Xiaoyu Song, Alan Coppola and Andrew Kennings, "On Segmented Channel Routability", IEEE International Symposium on Circuits and Systems (ISCAS), Scottsdale, Arizona, May 2002.
61. Xiaoyu Song, William N. N. Hung, Alan Mishchenko, Malzorgata Chrzanowska-Jeske, Alan Coppola and Andrew Kennings, "Board-Level Multiterminal Net Assignment", 12th ACM/IEEE Great Lakes Symposium on VLSI (GLSVLSI), New York, New York, April 2002.
62. William N. N. Hung and Xiaoyu Song, "On Optimal Cell Assignments in PCS Networks", 21st IEEE International Performance, Computing, and Communications Conference (IPCCC), Phoenix, Arizona, April 2002.
63. William N. N. Hung and Xiaoyu Song, "BDD Variable Ordering by Scatter Searchi", 19th IEEE International Conference on Computer Design (ICCD), Austin Texas, September 2001.
64. William N. N. Hung, Adnan Aziz and Ken McMillan, "Heuristic Symmetry Reduction for Invariant Verification", 6th IEEE/ACM International Workshop on Logic Synthesis (IWLS), Tahoe City, California, May 1997.

Patents

• Dhiraj Goswami, Soe Myint, N. N. William Hung, and Rajarshi Mukherjee, "METHOD AND APPARATUS FOR IDENTIFYING INCONSISTENT CONSTRAINTS", U.S. Patent Application No. 13/074,940, Publication No. US 2012/0253754 A1 (Published October 4, 2012).
• N. N. William Hung, Qiang Qiang, Guillermo Maturana, Jasvinder Singh, and Dhiraj Goswami, "METHOD AND APPARATUS FOR OPTIMIZING CONSTRAINT SOLVING THROUGH CONSTRAINT REWRITING AND DECISION REORDERING", U.S. Patent Application No. 12/967,294, Publication No. US 2012/0136635 A1 (Published May 31, 2012).
• Dhiraj Goswami, N. N. William Hung, Jasvinder Singh, and Qiang Qiang, "Adaptive state-to-symbolic transformation in a canonical representation", U.S. Patent No. 8099690, Issued January 17, 2012.
• N. N. William Hung, Dhiraj Goswami, and Jasvinder Singh, "Method and apparatus for constructing a canonical representation", U.S. Patent No. 8370273, Issued February 5, 2013.

Links

• Board-Level Routing Problem via SAT encoding
• Weblog