William N. N. Hung, Ph.D. [[Activities]] [[Publications]] [[Links]] [[Blog]] Research Interests: FPGA Synthesis, Formal Verification, Satisfiability, Logic Synthesis VLSI CAD, Nanotechnology, Quantum Computing, and Reversible Logic.

Professional Activities

• Publications Chair, Formal Methods in Computer Aided Design (FMCAD), 2009
• Vice Chair, IEEE CIS Emergent Technologies Technical Committee, Task Force on Quantum Computing, 2008 - Present
• Session Chair, IEEE World Congress on Computational Intelligence (WCCI), Special Session on Evolutionary Techniques in Nanotechnology and Quantum Computing, 2008
• Session Chair, ACM/IEEE Design Automation Conference (DAC), CAD for FPGA session, 2006
• Program Committee for the IEEE/ACM Design Automation and Test in Europe (DATE) 2005, 2006, 2008, 2009 and 2010
• Program Committee for the IEEE Congress on Evolutionary Computation (CEC) 2006, 2007 and 2009
• Organizing Committee for the IEEE Congress on Evolutionary Computation (CEC), Special Session on Quantum Computing and Quantum Computational Intelligence, 2007
• Organizing Committee for the IEEE World Congress on Computational Intelligence (WCCI), Special Session on Quantum Computing, 2006
• Program Committee for the 29th IEEE International Computer Software and Applications Conference (COMPSAC) 2005
• IEEE CIS Emergent Technologies Technical Committee, Task Force on Quantum Computing, 2004
• IEEE Senior Member
• Reviewer for the following:

  Design Automation Conference (DAC) International Conference on Computer-Aided Design (ICCAD) ACM SIGDA DAC Ph.D. Forum IEEE International Symposium on Circuits and Systems (ISCAS) IEEE Transactions on Computers IEEE Transactions on CAD IEEE Transactions on VLSI Systems IEEE Transactions on Nanotechnology IEEE Transactions on Circuits and Systems ACM Transactions on Design Automation of Electronic Systems (TODAES) University of California MICRO research fund (UC MICRO)

Publications

Journal Publications

1. Fei He, Xiaoyu Song, William N. N. Hung, Ming Gu, and Jiaguang Sun, "Integrating Evolutionary Computation with Abstraction Refinement for Model Checking", IEEE Transactions on Computers, Accepted, 2009.
2. Guowu Yang, William N. N. Hung, Xiaoyu Song, and Marek Perkowski, "Exact Synthesis of 3-qubit Quantum Circuits from Non-binary Quantum Gates", International Journal of Electronics, Accepted, 2009.
3. Guowu Yang, Xiaoyu Song, William N. N. Hung, Marek Perkowski, and Chang-Jun Seo, "Synthesis of Reversible Circuits with Minimal Costs", Calcolo, Vol. 45, No. 3, September 2008, pp. 193-206.
4. Guowu Yang, Xiaoyu Song, Marek Perkowski, William N. N. Hung, and Chang-Jun Seo, "Minimal Universal Library for nxn Reversible Circuits", Computers and Mathematics with Applications, Vol. 56, No. 1, July 2008, pp. 160-165.
5. William N. N. Hung, Changjian Gao, Xiaoyu Song, and Dan Hammerstrom, " Defect Tolerant CMOL Cell Assignment via Satisfiability", IEEE Sensors Journal, Vol. 8, No. 6, June 2008, pp. 823-830.
6. Lerong Cheng, Xiaoyu Song, Guowu Yang, William N. N. Hung, Zhiwei Tang and Shaodi Gao, "A Fast Congestion Estimator for Routing with Bounded Detours", Integration: the VLSI Journal, Vol. 41, No. 3, May 2008, pp. 360-370.
7. Guowu Yang, Xiaoyu Song, William N. N. Hung, and Marek A. Perkowski, "Bi-directional Synthesis of 4-bit Reversible Circuits", The Computer Journal, Vol. 51, No. 2, March 2008, pp. 207-215.
8. Fei He, William N. N. Hung, Xiaoyu Song, Ming Gu, and Jianguang Sun, "A satisfiability formulation for FPGA routing with pin rearrangements", International Journal of Electronics, Vol. 94, No. 9, September 2007, pp. 857-868.
9. Guowu Yang, Xiaoyu Song, Marek A. Perkowski, William N. N. Hung, Jacob Biamonte and Zhiwei Tang, "Four-level realization of 3-qubit reversible functions", IET Computers and Digital Techniques, Vol. 1, No. 4, July 2007, pp. 382-388.
10. William N. N. Hung et al, "Optimal Synthesis of Multiple Output Boolean Functions using a Set of Quantum Gates by Symbolic Reachability Analysis", IEEE Transactions on Computer-Aided Design, Vol. 25, No. 9, September 2006, pp. 1652-1663.
11. Fei He, Xiaoyu Song, Ming Gu, Guowu Yang, William N. N. Hung and Jiaguang Sun, "Probabilistic Optimization for FPGA Board Level Routing Problems", IEEE Transactions on Circuits and Systems II, Vol. 53, No. 4, April 2006, pp. 264-268.
12. Guowu Yang, William N. N. Hung et al, "Majority-Based Reversible Logic Gates", Theoretical Computer Science, Vol. 334, No. 1-3, April 2005, pp. 259-274.
13. William N. N. Hung et al, "Routability Checking for Three-Dimensional Architectures", IEEE Transactions on VLSI Systems, Vol. 12, No. 12, December 2004, pp. 1398-1401.
14. Lerong Cheng, William N. N. Hung et al, "Congestion Estimation for 3D Circuit Architectures", IEEE Transactions on Circuits and Systems II, Vol. 51, No. 12, December 2004, pp. 655-659.
15. William N. N. Hung et al, "Segmented Channel Routability via Satisfiability", ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 9, No. 4, October 2004, pp. 517-528.
16. William N. N. Hung and Naren Narasimhan, "Automatic Initialization by Environmental Assumption and Bounded Model Checking", Intel DTTC Online Journal, 1H04, August 2004.
17. Ming Gu, Fei He, William N. N. Hung, and Xiaoyu Song, "A Comparative Study on Search Strategies for Cell Assignments", International Journal of Computer Mathematics, Vol. 81, No. 7, July 2004, pp. 901-908.
18. William N. N. Hung and Naren Narasimhan, "Bridging the Abstraction Gap: Reference Model based Formal Property Verification of RTL designs", Intel DTTC Online Journal, 2H03, December 2003.
19. Xiaoyu Song, William N. N. Hung et al., "Board-level Multi-Terminal Net Assignment for the Partial Crossbar Architecture", IEEE Transactions on VLSI Systems, Vol. 11, No. 3, June 2003, pp. 511-514.
20. William N. N. Hung et al., "BDD Minimization by Scatter Search", IEEE Transactions on Computer-Aided Design, Vol. 21, No. 8, August 2002, pp. 974-979.

Conference Publications

21. He Zhu, Fei He, William N. N. Hung, Xiaoyu Song and Ming Gu, "Data Mining based Decomposition for Assume-Guarantee Reasoning", Formal Methods in Computer Aided Design (FMCAD), Accepted, 2009.
22. Xiaojun Lu, Guowu Yang, Jianping Li, Xiaoyu Song, and William N. N. Hung, "The Probability Logics for Nanoscale Inverters Cascade", IEEE Congress on Evolutionary Computation (CEC), June 2008.
23. William N. N. Hung, Changjian Gao, Xiaoyu Song, and Dan Hammerstrom, "Defect Tolerant CMOL Cell Assignment via Satisfiability", Nanoelectronic Devices for Defense and Security (NANO-DDS), Crystal City, Virginia, June 2007.
24. Guowu Yang, Fei Xie, Xiaoyu Song, William N. N. Hung, and Marek Perkowski, "A Constructive Algorithm for Reversible Logic Synthesis", IEEE Congress on Evolutionary Computation (CEC), July 2006.
25. Guowu Yang, Xiaoyu Song, William N. N. Hung, Fei Xie and Marek Perkowski, "Group Theory Based Synthesis of Binary Reversible Circuits", Theory and Applications of Models of Computation (TAMC06), May 2006.
26. Fei He, William N. N. Hung, Xiaoyu Song, Ming Gu, and Jiaguang Sun, "Segmented Channel Routing with Pin Rearrangements via Satisfiability", IEEE International Symposium on Circuits and Systems (ISCAS), pp. 6248-6251, Kobe, Japan, May 2005.
27. Guowu Yang, Xiaoyu Song, William N. N. Hung, and Marek Perkowski, "Bi-direction Synthesis for Reversible Circuits", IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Tempa, Florida, May 2005.
28. Guowu Yang, Xiaoyu Song, William N. N. Hung, and Marek Perkowski, "On Realization of 3-qubit Reversible Circuits with the minimum number of non-linear gates", 7th International Symposium on Representations and Methodology of Future Computing Technologies (RM2005), Tokyo, Japan, September 2005.
29. Guowu Yang, Xiaoyu Song, Marek Perkowski, and William N. N. Hung, "Minimal Universal Library for nxn Reversible Circuits", 7th International Symposium on Representations and Methodology of Future Comp uting Technologies (RM2005), Tokyo, Japan, September 2005.
30. Guowu Yang, William N. N. Hung, Xiaoyu Song and Marek Perkowski, "Exact Synthesis of 3-qubit Quantum Circuits from Non-binary Quantum Gates Using Multiple-Valued Logic", IEEE/ACM Design Automation and Test in Europe (DATE), Munich, Germany, March 2005.
31. Guowu Yang, Xiaoyu Song, William N. N. Hung and Marek Perkowski, "Fast Synthesis of Exact Minimal Reversible Circuits using Group Theory", IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), January 2005.
32. Guowu Yang, Jin Yang, William N. N. Hung and Xiaoyu Song, "Implication of Assertion Graphs in GSTE", IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), January 2005.
33. William N. N. Hung and Naren Narasimhan, " Reference Model Based RTL Verification: An Integrated Approach", 9th IEEE International High Level Design Validation and Test Workshop (HLDVT), Sonoma, California, November 2004.
34. William N. N. Hung and Naren Narasimhan, "Reference Model based Formal Property Verification of RTL designs", Intel Design and Test Technology Conference (DTTC), Portland, Oregon, August 2004.
35. William N. N. Hung, Xiaoyu Song, Guowu Yang, Jin Yang and Marek Perkowski, "Quantum Logic Synthesis by Symbolic Reachability Analysis", 41st ACM/IEEE Design Automation Conference (DAC), San Diego, California, June 2004.
36. Lerong Cheng, William N. N. Hung, Guowu Yang and Xiaoyu Song, "Congestion Estimation for 3D Routing", IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Lafayette, Lousiana, February 2004.
37. Guowu Yang, William N. N. Hung, Xiaoyu Song and Marek Perkowski, "Majority-Based Reversible Logic Gate", 6th International Symposium on Representations and Methodology of Future Computing Technologies (RM2003), Trier, Germany, March 2003.
38. William N. N. Hung, Xiaoyu Song, Alan Coppola and Andrew Kennings, "On Segmented Channel Routability", IEEE International Symposium on Circuits and Systems (ISCAS), Scottsdale, Arizona, May 2002.
39. Xiaoyu Song, William N. N. Hung, Alan Mishchenko, Malzorgata Chrzanowska-Jeske, Alan Coppola and Andrew Kennings, "Board-Level Multiterminal Net Assignment", 12th ACM/IEEE Great Lakes Symposium on VLSI (GLSVLSI), New York, New York, April 2002.
40. William N. N. Hung and Xiaoyu Song, "On Optimal Cell Assignments in PCS Networks", 21st IEEE International Performance, Computing, and Communications Conference (IPCCC), Phoenix, Arizona, April 2002.
41. William N. N. Hung and Xiaoyu Song, "BDD Variable Ordering by Scatter Search", 19th IEEE International Conference on Computer Design (ICCD), Austin Texas, September 2001.
42. William N. N. Hung, Adnan Aziz and Ken McMillan, "Heuristic Symmetry Reduction for Invariant Verification", 6th IEEE/ACM International Workshop on Logic Synthesis (IWLS), Tahoe City, California, May 1997.

E-mail: william_hung @ alumni DOT utexas DOT net Last Modified: August 31, 2009