VERIFICATION

Description: ACE is a ACE.

BOOKS ON VERIFICATION

• Theorem Provers in Circuit Design - Theory Practice and ExperienceComputer Science, Formal Logic, Hardware Verification. For research and development professionals.- Level: Proceedings. R. Kumar, Forschungszentrum...
• Principles of Semiconductor Network Testing - Forward- Amir Afshar. Foreword | Preface | Table of Contents | To Order This Book | First Chapter, Part One

7. VERIFICATION

HARDWARE VERIFICATION

• Typed CIRCAL: A High Level Framework for Hardware Verification George Milne from Napier Univ. in UK. Project description.

SOFTWARE VERIFICATION FOR IMAGE PROCESSING

• Verification and Test Concept From Spain. Software verification of a system for image processing.

SYSTEM LEVEL VERIFICATION

• VLSI Design and System Level Verification for the Mini-Disc ASIC Verification, paper from Japan, DAC 96.
• Testing, Verification & Validation From TekSci, a software services company. Software,hardware, system test.

CHRYSALIS - THE FIRST FORMAL DESIGN AND VERIFICATION COMPANY.

• Chrysalis Symbolic Design - The Formal Design Company Chrysalis company web page.
• Design EXPLORE--Interactive Formal Verification First and famous already interactive formal verification tool.

BERKELEY RESEARCH IN HARDWARE VERIFICATION

• http://diva.eecs.berkeley.edu/~cadsrc/REVIEW/fv.review.agenda Research of Prof.Brayton in Verification, recent.

JOURNALS IN TEST, DESIGN FOR TEST, FAULT MODELS, VERIFICATION AND IN THESE ISSUES, AS RELATED TO DESIGN.

• Contents ED&TC '94
• IEEE D&T: Tables of Contents, Past Issues
• D&T 1995 Index
• D&T: Abstracts - 1995 Abstracts from this journal, 1995.

VHDL VERIFICATION

• Bibliography on VHDL Verification

HARDWARE VERIFICATION RESEARCH GROUPS AT UNIVERSITIES.

HARDWARE VERIFICATION RESEARCH GROUPS AT USA UNIVERSITIES.

• Hardware Verification Group Group of Prof. Dill from Stanford. Research and Publications.

  VERIFICATION BIBLIOGRAPHIES

• Bibliography on Hardware Verification and Formal MethodsBibliography on Hardware Verification and Formal Methods. This bibliography forms a part of the Computer Science Bibliography Collection.
• Bibliography on Hardware Verification and Formal MethodsBibliography on Hardware Verification and Formal Methods. This bibliography forms a part of the Computer Science Bibliography Collection.
• No TitleArticle: 2275 of comp.lang.vhdl Path: pitt.edu!birdie-blue.cis.pitt.edu!gatech!howland.reston.ans.net!pipex!uknet!nessie!nessie.mcc.ac.uk!sr From:...
• Abstracts of Selected PublicationsAbstracts of Selected Publications. A Modular Presentation of Modal Logics in a Logical Framework. David Basin, Sean Matthews and Luca Vigano. FILES:...
• No TitleTPTP Citations. The following is a summary of the papers which cite the TPTP Problem Library. The purpose of this index is to raise awareness about system.
• Laboratory for Applied Logic Reading ListLAL READING LIST. The following papers are suggested readings for new member of the Laboratory for Applied Logic. The readings will acquaint you with some.
• Laboratory for Applied LogicFORMAL METHODS AROUND THE WORLD. A number of other research laboratories in formal methods have made information available on the web. This page collects..
• Bibliographies on Software/Hardware Engineering and Formal MethodsThe Collection of Computer Science Bibliographies. Up: The Collection of Computer Science Bibliographies. Home. Bibliographies on Software/Hardware..
• ATG Reading ListAbstract Type Group Reading List. The List. HML: A Hardware Description Language Based on SML John O'Leary, Mark Linderman, Miriam Leeser, Mark Aagard...

  BENCHMARK CIRCUITS FOR VERIFICATION

• IFIP WG10.5 Hardware Verification Benchmark SuiteIFIP WG10.5 Benchmark Circuits. This is the official home page of the IFIP WG10.5 Benchmark-Circuits Suite for Hardware Verification. The set of benchmark.
• 2 The Benchmark CircuitsNext] [Previous] [Top] 2 The Benchmark Circuits. 2.1 - Releases. 2.2 - Verification Problem Presentation. 2.2.1 - VHDL. 2.2.2 - Storage Elements and...
• DocumentationNext] Benchmark-Circuits for Hardware -Verification v1.1.0. This is not the actual version 1.2.0 which can be only found directly at our ftp server!..

  PHD THESIS ON VERIFICATION.

• No TitleRestricted Branching Programs and Hardware Verification PhD Thesis, Stephen Ponzio, MIT, August 1995. Table of Contents.

  CONFERENCES RELATED TO FORMAL VERIFICATION.

• No TitleThe International Conference on Formal Methods in Computer-Aided Design. (FMCAD -- Successor to TPCD) CALL FOR PAPERS. Palo Alto, CA, USA. 6 - 8. November.
• Ninth Annual Conference on Computer AssuranceThis information provides you with details concerning The Ninth Annual Conference on Computer Assurance.
• pre-conference Workshop on Applied Formal MethodsWORKSHOP ON APPLIED FORMAL METHODS. Dates : December 14-17, 1996 Venue : Raman Auditorium Sponsored by: Indian Association Of Research in Computing..
• No TitleFMCAD 96 Program. Wednesday, November 6, 1996. 8:00-8:50. Check-In and Late Registration. 9:00-10:00. Invited Talk. Chair: M. Srivas. Kurt Keutzer,...
• No TitleProgramme The 1996 International Conference on Theorem Proving in Higher Order Logics Monday 26 August
• The TPCD ProceedingsTheorem Provers in Circuit Design. Proceedings of the IFIP WG10.2 International Conference on Theorem Provers in Circuit Design: Theory, Practice, and...
• No TitleCALL FOR PAPERS | | | | The International Conference on | | | | Formal Methods in Computer-Aided Design: | | (FMCAD -- Successor to TPCD) |

  COMPUTATIONAL LOGIC INC. (CLI) COMPANY

• No TitleTechnical Reports September 6, 1994. Computational Logic, Inc. 1717 West Sixth St., Suite 290 Austin, Texas 78703-4776. 101. Design Goals of ACL2, by Matt.
• No TitleHardware Verification Using Mechanical Theorem Provers. 3 Days. Prerequisites: Introduction to the Boyer-Moore Theorem Prover and Introduction to Hardware.

  OTHER INDUSTRIAL RESEARCH ON VERIFICATION

• B-Tree Systems, Inc.B-Tree's Career Opportunity Center. Welcome to B-Tree's Career Opportunity Center. If you have read about our unique product and its enviable position in.

  MILITARY RESERACH ON VERIRFICATION

• COMPLEX SYSTEMSCOMPLEX SYSTEMS Mr. Robert Parker. Good morning. I'm going to talk to you for a few minutes about this area of "Complex Systems" and a task in...

  VERIFICATION OF MICROPROCESSORS

• No TitleMODEL: mpc860_hv VERSION: v1.3 TITLE: Quad Integrated Communications Controller DATE: 20-Mar-97 FUNCTION: processors SUBFUNCTION: microprocessor BASE PART.
• Structure and Correctness of MicroprocessorsStructure and Correctness of Microprocessors. A C J Fox, Dr N A Harman and Professor J V Tucker. Work on the structure and correctness of microprocessors.
• Formal Hardware VerificationCoverage-Based Microprocessor Verification. Formal Hardware Verification. Practical Aspects of Formal hardware Verification Verifying the correct behavior.

  VERIFICATION RESEARCH OF INTEL

• Intel and the CommunityVisiting Faculty. Professor Andrew M. Fraser. Professor Shang-Hua Teng. Professor Alok Choudhary. Professor Carl Seger. Professor David L. Dill.

  BINARY DECISION DIAGRAMS IN VERIFICATION.

• BDDTCL: An Environment for Visualizing and Manipulating Binary Decision DiagBDDTCL: An Environment for Visualizing and Manipulating Binary Decision Diagrams. Kurt E. Partridge University of Washington Box 352350 Seattle

  VERIFICATION FOR TELECOMMUNICATION.

• Telecommunications BackgrounderSpecialized Verification Tools for Telecommunications Applications. Telecommunications Workbenches Product Backgrounder. Contents: Introduction..

  RUBY LANGUAGE

• Mary Sheeran's useful linksHardware design. The Ruby relational design language. Designing Correct Circuits '96. A list of conferences and workshops in formal methods for hardware...

  ML LANGUAGE

• ReferencesNext: About this document Up: The Metalanguage ML Previous: Experimental support for. References. 1. P.B. Andrews, An Introduction to Mathematical Logic...

  HOL LANGUAGE

• ReferencesNext: About this document Up: The HOL System Previous: Timing and counting. References. 1. P.B. Andrews, An Introduction to Mathematical Logic and Type..
• Demonstration Code for Hardware Verification in HOLDemonstration Code for Hardware Verification in HOL. The following files introduce proof techniques for HOL. ML expressions. Sieve of erosthanes in ML...
• The HOL SystemThe HOL System. The HOL System is an environment for interactive theorem proving in a higher-order logic. Its most outstanding feature is its high degree..
• ReferencesNext: About this document Up: Theorem Proving in HOL Previous: Theorem continuations without. References. 1. P.B. Andrews, An Introduction to Mathematical.
• Programme: Theorem Proving in Higher Order LogicsProgramme: TPHOLs'96. The 1996 International Conference on Theorem Proving in Higher Order Logics. Monday 26 August. 12.00 Registration. 12.30 Lunch..
• Information about new_theory `HOL88`new_theory `HOL88` An Introduction to Hardware Verification in Higher Order Logic. by. Graham Birtwistle, Shiu-Kai Chin, Brian Graham. Table of contents..
• Information about new_theory `HOL88`new_theory `HOL88` An Introduction to Hardware Verification in Higher Order Logic. by. Graham Birtwistle, Shiu-Kai Chin, Brian Graham. Table of contents..
• Description of the HOL Theorem Proving SystemDescription of the HOL Theorem Proving System. Keywords: Higher Order, Classical, Natural deduction with tactics. Description: Semantics: Classical higher.
• The HOL Theorem Proving SystemWelcome to the HOL Documentation Page. The Laboratory for Applied Logic at Brigham Young University is pleased to provide documentation and information...
• Current State of KnowledgeNext: Organizing Abstract Modules Up: Project Description Previous: Impact. Current State of Knowledge.   The HOL theorem proving system [GM93] has...
• TPHOLs'96 bibliographic informationLecture Notes in Computer Science 1125. Joakim von Wright, Jim Grundy, and John Harrison (Eds.) Theorem Proving in Higher Order Logics: 9th International.
• TPHOLs '96TPHOLs '96. CALL FOR PARTICIPATION 1996 INTERNATIONAL CONFERENCE ON THEOREM PROVING IN HIGHER ORDER LOGICS...
• No TitleCP95 final call for papers (text+tex)
• Ninth Annual Conference on Computer AssuranceThis information provides you with details concerning The Ninth Annual Conference on Computer Assurance.
  Papers on FIDO and MONAPapers on FIDO and MONA. Concepts Applications Algorithms Other. Concepts. Mona: Monadic Second-Order Logic in Practice. TACAS '95. Our first paper on the

  SEMINARS AND COURSES ON VERIFICATION.

• No TitleEECS 298-11: CAD Seminar Wednesday, February 7, 1995, 5pm 531 Cory Hall, Hogan Room Hardware Verification at AT&T Robert P. Kurshan AT&T Bell Laboratories.
• HOL Training CourseIntroduction to the HOL Theorem Prover and its Applications. A Training Course on HOL. The HOL system is a powerful and widely used computer-aided tool...
• ReferencesNext: About this document Up: No Title Previous: words.ml. References. 1. P. Andrews. An Introduction to Higher Order Logic: to Truth through Proof...
• Data Abstraction in Hardware VerificationData Abstraction in Hardware Verification. So far, the types of the arguments for both the implemenation and behavioral specifications have been the same..
• No Titlebegin{thebibliography}{Win92b} \bibitem[DLP79]{socialproof} Richard DeMillo, Richard Lipton, and Alan Perlis. \newblock Social processes and proofs of..
• AR Talks IndexReturn to ARG Home Page. AR Talks Index. Abstracts from most of the previous talks are available. Formal Verification of the Fairisle ATM Switch Fabric...
• No TitleSubject: CPS 1.0 PARALLEL DISCRETE-EVENT SIMULATOR NOW AVAILABLE.
• Author-IndexAuthor-Index. previous page - index root. Hirschman, Lynette. Hirschmann, Petra. Hirschowitz, André Hirsh, Sandra G. Hirshfeld, J. Hirshfeld, Yoram.
• Technical ReportsMax Planck Society Fault-Tolerant Computing Group at the University of Potsdam List of Technical Reports 1992 - 1995. 1992. MPI-I-92-601. E.S. Sogomonyan.

  WORKSHOPS AND CONFERENCES RELATED TO VERIFICATION.

• ETW'97: IEEE European Test Workshop - Call for papers.Prev][Next][Index] ETW'97: IEEE European Test Workshop - Call for papers. From: prinetto@chiusella.polito.it (Paolo Prinetto) No TitlePlease find enclosed the call for papers for ETW'97: IEEE European Test Workshop. This call and other information on ETW'97 are also accessible by WWW at..
• EDCC-2EDCC-2. Conference Details: Second European Dependable Computing Conference Taormina, Italy. Contact Person: Luca Simoncini Tel.: Fax: E-Mail: Homepage:
• IEEE European Test WorkshopIEEE European Test Workshop. Call for Participation. IEEE European Test Workshop Montpellier (Hotel la Corniche in Sete), France June 12 - 14, 1996. The..
• EDCC-2 Advance ProgramPlease post and distribute in your country as largely as possible. Hope to see you in Taorm