Haven't discussed adders so
we don't even know if they exist (BTW, they do)
Clock edge will trigger register
before the signals have reached the input of the register (setup
time violation)
The Propagation Delay could
be solved many different ways
We could add a number of buffers
or inverter-pairs to add an artificial delay to the clock edge
A better solution is to trigger
the register on the falling edge of the coin-induced pulse. If
the pulse-width is determined by physics we can rest assured
it will satisfy the setup-time constraint.
Adders
We need a 4-bit adder
How could we do this?
We could use combinational logic.
But...
Is time consuming and difficult
(8-input problem)
Can't be easily expanded
Inelegant - a brute force approach
There is a cleaner approach.
Let's begin with a 1-bit adder.
Draw block diagram with 2
inputs and 2 outputs (result & carry out)
Work through the truth table
Write the expressions directly
This is not difficult
How about a 2-bit adder. This
requires an adder with three inputs.
Draw a block diagram with
3 inputs (the 2 bits plus a carry-in) and 2 outputs (result and
carry-out).
Work through the truth table.
Show students that a the
boolean expression and logic diagrams for both outputs can be
obtained from a careful understanding of what the device is doing.
K-Maps are unnecessary, but could be used as a fall-back or as
a check.
The 2-bit adder can now be easily
expanded into an adder with as many bits as we like
However, there are problems
(ask the students to spot them)
Propagation delay
This is very similar to the
problem with using ripple counters
Manufactuers usually solve this
problem in their designs
This is why these devices are
often described as having a "fast carry"
N-Pulse Generators
There is no data sheet for these
devices so we have to construct them ourselves.
Ask the students how to begin.
This is a difficult problem so they may not have any ideas at
first.
Let them know that it is
easy to construct an oscillator (clock signal) with a specified
frequency. These devices are discussed in chapter 10, which is
not covered in this course.
Draw diagram.
Go over problems with initial
design:
The 5th pulse (for quarters)
is short.
Can fix by resetting the input
latch on a falling clock edge
If the input pulse is too long
it may be counted as 2 or more coins.
Can fix by triggering off of
the rising edge of the coin pulse
Input Signal Debouncing
When the coin drops, the switch
may bounce on the contacts when it returns to it's resting position.
We need to decode this as 1
coin
To solve this, we need to know
the maximum period that the coin may bounce for.
The ME has to give us this information.
The maximum bouncing period
must be less than the minimum period between coins.
Again, the ME must design this
into the coin input mechanism.
Like the other design problems,.
there are many possible solutions.
One of the best, is to use a
74LS121 monostable multivibrator
This device can be used to generate
a pulse of specified length for every input trigger.
The device is level triggered,
not edge triggered.
This device is discussed briefly
in Ch. 9 and in detail in Ch. 10.
Change Generator
Options include:
Logic Gates We could do this with
logic gates. However, this would be very tedious and difficult
(8 inputs). It would also be costly in terms of the number of
IC's.
PAL Device We could try to do this
with a PAL, but that would require us to find the boolean expressions
which is also difficult and tedious. Additionally, we might need
more product terms than the PAL device can provide.
PROM This would work, but
it requires a large truth table and is time consuming.
Subtractor This is an elegant option
that requires more IC's than a PROM or PAL device, but is easily
expandable to larger counters for future upgrades.
Subtractor Architecture
Subtractors are hard to find
in IC's.
However, we could build one
using the same approach that we used to build an adder.
Go over combinational logic
that converts the subtractor output to the system outputs.
Note that we can use don't cares
for differences greater than 25 cents, because the subtractor
will never reach that high of value.
This makes the expressions for
the outputs very simple.
Note that if we subtract the
price from the amount paid, the Borrow-out of the subtractor
indicates whether enough has been paid to release the product
or not.
One of the very nice things
about this design is that the combinational logic will work regardless
of how big the subtractor is. This minimizes the time to redesign
for upgrades.
Concluding Remarks and ECE 271
To do synthesis (design) you
have to think creatively. Engineers don't get enough credit for
this, but this is a very important aspect of being a successful
engineer.
You must also be able to think
very analytically for analysis to catch mistakes and troubleshoot
design problems.
You now have the tools to design
many types of digital systems and understand the logic used in
many types of devices.
ECE271 will give you many more
tools. In that class you will talk about how to anaylze and design
devices that have memory (like the vending machine) as opposed
to combinational logic (which was most of the focus for this
course).
After ECE 271, you will be ready
to discuss microprocessor architectures.