Welcome to Zhenkun Yang's Website
About:
- Zhenkun is a Research Scientist at Strategic CAD Labs, Intel Labs.
- He was a Ph.D student and research assistant in System Validation Lab at Portland State University, where he worked with Prof. Fei Xie.
- He received his bachelor's and master's degrees from Wuhan University of Science and Technology in 2005 and 2008.
Zhenkun Yang
Computer Science Department Portland State University FAB-135 1900 SW 4th Avenue Portland, Oregon 97201, USA e-mail: zhenkun<at>cs.pdx.edu |
Research Interests:
- Software Testing, Software and Firmware Security
- Formal Verification for Behavioral Synthesis, Equivalence Checking, Theorem Proving and Model Checking
Professional Service
- Program Committee, The 2023 IEEE/ACM International Conference on Computer-Aided Design (ICCAD 2023), San Francisco, California, USA, October 29 - November 2, 2023
- Program Committee, The 16th IEEE International Conference on Embedded Software and Systems (ICESS 2020), Shanghai, China, July 9-10, 2020
- Program Committee, The 19th International Conference on Formal Methods in Computer-Aided Design (FMCAD '19), San Jose, CA, October 22-25, 2019
- Session Chair, "Verification of Large Systems", The 19th International Conference on Formal Methods in Computer-Aided Design (FMCAD '19), San Jose, CA, October 22-25, 2019
- Program Committee of Student Forum, The 19th International Conference on Formal Methods in Computer-Aided Design (FMCAD '19), San Jose, CA, October 22-25, 2019
- Special Session co-organizer, In CAD We Trust? The Question that Defines our Trusted Microelectronics Future, Design Automation Conference (DAC'19), Las Vegas, Nevada, June, 2019
- Program Committee, The 15th IEEE International Conference on Embedded Software and Systems (ICESS 2019), co-located with DAC 2019, Las Vegas, Nevada, June 2-3, 2019
Publications and Presentations:
Correct-by-Construction Design of Custom Accelerator Microarchitectures.
Jin Yang, Zhenkun Yang, Jeremy Casas and Sandip Ray.
To appear in the IEEE Transactions on Computers.Towards A Formally Verified Fully Homomorphic Encryption Compute Engine. (PDF)
Jeremy Casas, Zhenkun Yang, Wen Wang, Adwait Godbole and Jin Yang.
Design Automation Conference (DAC'23), San Francisco, CA, USA, July 2023.A Scalable Formal Approach for Correctness-Assured Hardware Design. (LINK)
Jin Yang, Jeremy Casas and Zhenkun Yang.
Design Automation Conference (DAC'23), San Francisco, CA, USA, July 2023. (Invited Paper)An Automated Verification Framework For HalideIR-Based Compiler Transformations.
Yanzhao Wang, Fei Xie, Zhenkun Yang, Jeremy Casas, Pasquale Cocchini and Jin Yang.
To appear in Design, Automation and Test in Europe (DATE'23), Antwerp, Belgium April 2023.An Equivalence Checking Framework for Agile Hardware Design.
Yanzhao Wang, Fei Xie, Zhenkun Yang, Pasquale Cocchini, Jin Yang.
To appear in the 28th Asia and South Pacific Design Automation Conference (ASP-DAC 2023), Tokyo, Japan, January 2023.Accelerator Design with Decoupled Hardware Customizations: Benefits and Challenges. (PDF)
Debjit Pal, Yi-Hsiang Lai, Shaojie Xiang, Niansong Zhang, Hongzheng Chen, Jeremy Casas, Pasquale Cocchini, Zhenkun Yang, Jin Yang, Louis-Noël Pouchet, Zhiru Zhang.
Design Automation Conference (DAC'22), San Francisco, CA, USA, July 2022. (Invited Paper)Towards a Correct-by-Construction FHE Model. (Cryptology ePrint Archive) (PDF)
Zhenkun Yang, Wen Wang, Jeremy Casas, Pasquale Cocchini, and Jin Yang.
In the 1st Annual FHE.org Conference on Fully Homomorphic Encryption (affiliated with EUROCRYPT 2022), Trondheim, Norway, May 29, 2022.FIRVER: Concolic Testing for Systematic Validation of Firmware Binaries. (PDF)
Tashfia Alam, Zhenkun Yang, Bo Chen, Nicholas Armour and Sandip Ray.
In Proceedings of the 27th Asia and South Pacific Design Automation Conference (ASP-DAC 2022), Taipei, Taiwan, January 2022 (Virtual Conference).A Highly Configurable Hardware/Software Stack for DNN Inference Acceleration. (PDF)
Suvadeep Banerjee, Steve Burns, Pasquale Cocchini, Abhijit Davare, Shweta Jain, Desmond Kirkpatrick, Anton Sorokin, Jin Yang, Zhenkun Yang.
arXiv preprint arXiv:2111.15024 (2021).UEFI Firmware Fuzzing with Simics Virtual Platform. (PDF)
Zhenkun Yang, Yuriy Viktorov, Jin Yang, Jiewen Yao and Vincent Zimmer.
In Proceedings of the 57th Design Automation Conference (DAC'20), San Francisco, CA, USA, July 2020.Automated Bug Detection and Replay for COTS Linux Kernel Modules with Concolic Execution. (PDF)
Bo Chen, Zhenkun Yang, Li Lei, Kai Cong and Fei Xie.
In Proceedings of the 27th IEEE International Conference on Software Analysis, Evolution and Reengineering (SANER 2020), London, Ontario, Canada, February 18-21, 2020.End-to-End Concolic Testing for Hardware/Software Co-Validation.
Bo Chen, Kai Cong, Zhenkun Yang, Qin Wang, Jialu Wang, Li Lei and Fei Xie.
In Proceedings of the 15th IEEE International Conference on Embedded Software and Systems (ICESS 2019), Las Vegas, Nevada, June 2-3, 2019.CRETE: A Versatile Binary-Level Concolic Testing Framework. (PDF)
Bo Chen, Christopher Havlicek, Zhenkun Yang, Kai Cong, Raghudeep Kannavara and Fei Xie.
In Proceedings of the 21st International Conference on Fundamental Approaches to Software Engineering (FASE'18), Thessaloniki, Greece, April 2018.Concolic Testing of SystemC Designs. (PDF)
Bin Lin, Kai Cong, Zhenkun Yang, Zhigang Liao, Tao Zhan, Christopher Havlicek, Fei Xie.
In Proceedings of the 19th International Symposium on Quality Electronic Design (ISQED'18), Santa Clara, CA, USA, March 2018.Validating Scheduling Transformations for Behavioral Synthesis. (PDF)
Zhenkun Yang, Kecheng Hao, Kai Cong, Li Lei, Sandip Ray, and Fei Xie.
In Proceedings of Design, Automation and Test in Europe (DATE'16), Dresden, Germany, March 2016. IEEE.Generating High Coverage Tests for SystemC Designs Using Symbolic Execution. (PDF)
Bin Lin, Zhenkun Yang, Kai Cong, and Fei Xie.
In Proceedings of The 21st Asia and South Pacific Design Automation Conference (ASP-DAC'16), Macao, China, January 2016.Automatic Fault Injection for Driver Robustness Testing. (PDF)
Kai Cong, Li Lei, Zhenkun Yang, and Fei Xie.
In Proceedings of International Symposium on Software Testing and Analysis (ISSTA'15), Baltimore, Maryland, July 2015.Validating Direct Memory Access Interfaces with Conformance Checking. (PDF)
Li Lei, Kai Cong, Zhenkun Yang, and Fei Xie.
In Proceedings of International Conference on Computer-Aided Design (ICCAD'14), San Jose, CA, USA, November 2014.Scalable Equivalence Checking for Behavioral Synthesis.
Zhenkun Yang. SIGDA Ph.D. Forum at Design Automation Conference (DAC'14), San Francisco, CA, USA, June 2014.Scalable Certification Framework for Behavioral Synthesis Front-End. (PDF)
Zhenkun Yang, Kecheng Hao, Kai Cong, Li Lei, Sandip Ray, and Fei Xie.
In Proceedings of 51st Design Automation Conference (DAC'14), San Francisco, CA, USA, June 2014.Coverage Evaluation of Post-silicon Validation Tests with Virtual Prototypes. (PDF)
Kai Cong, Li Lei, Zhenkun Yang, and Fei Xie.
In Proceedings of Design, Automation and Test in Europe (DATE'14), Dresden, Germany, March 2014.Compiler Transformation Validation in Behavioral Synthesis.
Zhenkun Yang.
Student Forum (poster + 5 minutes talk) of International Conference on Formal Methods in Computer-aided Design (FMCAD'13), Portland, OR, USA, October 2013.Equivalence Checking for Compiler Transformations in Behavioral Synthesis. (PDF)
Zhenkun Yang, Kecheng Hao, Kai Cong, Sandip Ray, Fei Xie.
In Proceedings of 31st IEEE International Conference on Computer Design (ICCD'13), Asheville, NC, USA, October 2013.Handling Design and Implementation Optimizations in Equivalence Checking for Behavioral Synthesis. (PDF)
Zhenkun Yang, Kecheng Hao, Sandip Ray, and Fei Xie.
In Proceedings of 50th Design Automation Conference (DAC'13), Austin, TX, USA, June 2013.Automated Synthesis of Passive Analog Filters Using Graph Representation.
Zhaohui Gan, Zhenkun Yang, Tianyou Yu, and Min Jiang.
Expert Systems With Applications, 37(3), 1887-1898, March, 2010.Automatic Synthesis of Practical Passive Filters Using Clonal Selection Principle-Based Gene Expression Programming.
Zhaohui Gan, Zhenkun Yang, Gaobin Li, and Min Jiang.
In the 7th International Conference on Evolvable Systems: From Biology To Hardware (ICES'07), Wuhan, China, 2007.