ISMVL'2000
The 30th IEEE INTERNATIONAL SYMPOSIUM ON
MULTIPLE-VALUED LOGIC


CALL FOR PAPERS

PORTLAND, OREGON, USA
MAY 23 - 25, 2000

The Multiple-Valued Logic Technical Committee of the IEEE Computer Society will hold its 30th annual symposium on May 23-25, 2000 in Portland, Oregon, USA. Portland is the largest town in Oregon, on the West Coast of United States, located between California and the state of Washington. Portland has an International Airport, recently remodeled, and is accessible from all the world. The symposium is sponsored by the IEEE Computer Society and by the Oregon Center for Advanced Technology Education. You are invited to submit an original research, survey or tutorial paper on any subject in the area of Multiple-Valued Logic, including, but not exclusively limited to:

LOGIC DESIGN AND SWITCHING THEORY
DECISION DIAGRAMS
PROGRAMMABLE LOGIC
CIRCUIT/DEVICE IMPLEMENTATION
HIGH SPEED COMPUTATION
OPTICAL COMPUTING
FAULT DETECTION AND DIAGNOSIS
RELIABILITY
ALGEBRAIC AND FORMAL ASPECTS
FUZZY LOGIC
ARTIFICIAL INTELLIGENT SYSTEMS
PHILOSOPHICAL ASPECTS
AUTOMATED DEDUCTION

Authors are requested to submit 5 copies (in English) of their double-space typed manuscript on 8.5 by 11 inch or A4 paper by November 1,1999. Each paper should be no longer than 20 pages and should include a 50-100 word abstract. Papers should be sent to the closest Program Chair/Co-Chair:

Program Co-Chairs

ASIA/PACIFIC

Yutaka Hata,
Dept. of Comp. Engineering,
Himeji Inst. of Technology,
2167 Shosha Himeji
671-2201 Japan
hata@comp.eng.himeji-tech.ac.jp

AMERICAS

Dan A. Simovici
Dept. of Math. and Comp. Sci.
University of Massachusetts at Boston,
Boston, MA 02125,
USA
dsim@cs.umb.edu

EUROPE/AFRICA

Svetlana N. Yanushkevich,
Inst. of Comp. Sci. and Inf. Syst.
Tech. University of Szczecin,
Zolnierska Street 49,
71-210 Szczecin, Poland
januszki@ii.tuniv.szczecin.pl

Authors will be notified by February 2, 2000. Photo-ready copies of accepted papers are due by March 1, 2000. For additional information contact

Symposium Chair

Prof. Marek Perkowski
Department of Electrical and Computer Engineering
Portland State University
Portland, Oregon, 97207-0751, U.S.A.
Phone: +1-503-725-5411
Fax : +1-503-725-3807
Email: mperkows@ee.pdx.edu
http://www.ee.pdx.edu/~mperkows

The symposium will be followed by the workshop on Post-Binary Ultra-Large Scale Integration Systems held on May 26, 2000, (Chair: Prof. Takao Waho, Sophia University, Japan, waho@sscd.ee.sophia.ac.jp" ), and preceded by the Third Oregon Symposium on Logic, Design, and Learning, (Chair: Dr. Alan Mishchenko, Portland State University, Portland, OR, alanmi@ee.pdx.edu )

mperkows@ee.pdx.edu