PROJECTS FOR YEAR 2001.

In addition to VHDL simulators that you start to use in homework 1, you will use various synthesis and design creation tools in the projects: Exemplar's Leonardo, Renoir, and test tools. All these tools are installed at PSU (most are installed also in OCATE), but every month there are some changes of the system, so it is your responsibility to start testing these tools on simple examples as early as possible. In case of troubles, you can send email to Support People requesting their help. In such case, state clearly what is wrong. Send a copy of this email to me.
EVERYBODY SHOULD BE READY FOR THE PRESENTATION ON APRIL 18. You can have it earlier if you are ready. The sooner the better.

#### PROJECT ONE. SIMPLE IMAGE PROCESSOR. ##### Simulation and Synthesis of an FPGA-based Image Processor for a Robot. The goal of this project is to continue the work of last year students on "An eye for the robotic dog". We are not sure it will be a dog, we work mostly on a robot spider with 6 legs. If you select the spider version, the camera will be located on the back of the robot.
This is a typical VHDL project. You will also learn fundamentals of computers for image processing. You will help to build the new Intelligent Robotics Laboratory. This project has been simplified for two people. No need to work on camera interface or a board. Use standard Xilinx or Altera board with standard parallel interface.
PRESENTATION NUMBER 1.
1. Presentation number one. Study of simple convolution-based image processor based on literature. Present your concept of interfacing the board to a PC computer that has the camera.
  
  Wednesday, April 12. Each student has to present part of the presentation.
  Written report should be given.
  It has to specify what is needed to complete the project and should have a plan of work.
  The project should be realized using either Altera or Xilinx boards with one chip on it.
  This project is NOT related to DEC-PERLE.
  1. Student X. Theory of convolution-based image processing for robotics.
    Exactly, what hardware will be located on your FPGA board. Do not forget about communication with the PC. Try to estimate the complexity. Be realistic. Plan of work for the group and milestones; who does what. Analysis of previous VHDL codes written by students and codes from literature. What will be re-used.
PROJECT THREE. NEW CCM. Dual-Processor Cube Calculus Machine.
This is a project that combines the "old" CCM processor with a standard microcontroller in order to create a controller with extended list of instructions for pattern recognition and robotics applications. Besides VHLD for use in microcontroller and DSP-like architectures, you will learn from this project about many things; dual processor architectures, cube calculus, logic algorithms, and standard controllers. All VHDL pieces exist, have been simulated and synthesized. But since you redesign the whole architecture, you will have to resimulate both processors and next the combined dual-processor architecture. Several variants of integration are possible and you have to analyse which is best to execute efficiently the most important algorithms for which this new architecture is intended.
This is basically an integration type of work and a study in using tools, less emphasis on VHDL language itself, rather on its use in design. However, this is still the project in which you use VHDL for simulation, verification and synthesis. You will help to build the new Intelligent Robotics Laboratory. If you have any questions, please feel free to ask.
PROJECT FOUR. DECOMPOSER.
Processor for Data Mining and Robot Machine Learning based on Functional Decomposition. This is a special processor for decomposition of binary functions in real time. Because these functions describe feedback behavior, the synthesis plays a role of learning from examples for a robot. The signals come from sensors and camera.
Emphasis on array processor design and VHDL. The design must be synthesizable. This is not a system integration project. If successful, it will be also integrated with a robot, but simulation and synthesis are sufficient.
PRESENTATION NUMBER 1.
1. How the Decomposer works. Discuss the partitioning to chips in detail. Milestones, plans, tool design.
2. Variable partitioning circuit. Detailed discussion.
3. Graph coloring circuit. Detailed Discussion.
PROJECT FIVE. COMMUNICATION CIRCUIT.
This is a special project for one student.
1. Hashir Karim Kidwai. Project leader.
  
  PRESENTATION NUMBER 1.
PROJECT SIX. ASIC DESIGN. This is a special project for one student.
1. Trudy Lary. Project leader.
  
  PRESENTATION NUMBER 1.
PROJECT SEVEN. IMAGE PROCESSING FOR A ROBOT.
This is a new project for special request of group of students. We have an infrared-controlled robot dog, a spider, many robot arms, skeleton, etc. You can see them in our lab. There are also many pictures and photographs in my WWW Page. If you want to design or purchase (PSU will pay) an IR transmitter and will be able to hook your circuit to it, then you can build this variant, the camera will be perhaps not mounted on the dog, but will look at the scene from a stationary position from above. All animals should be able to follow something specific, like a ball, or a Barbie doll, or your leg. Mechanical and electrical details are left to your creativity and imagination. Most of image processing circuits have been designed last year. This project variants leaves a lot of freedom to your group how to select the robot, the platform and the code. Your only limitations are: (1) it must work, (2) it must be a control of one of robots from the lab.

You can take as much as you can from the last year project, but you have to work
on interfacing this circuit to a PC which has Intel Professional Camera.
PRESENTATION NUMBER 1.
1. Chung-Ming Raman Lau. What is this project about. What board and chips will be used. What robot will be used. How camera and chip/board will be interfaced? Project integration, stages of work, milestones, what is needed. Expected troubles. Short term and long term vision of VHDL-based Fast Prototyping for Robotics based on: (1) DEC-PERLE software environment on DEC Workstation, (2) VHDL compiler and Mentor tools installed on other computer and connected to DEC by a network, (3) Cameras, robots, sensors, motors, etc, connected directly to the DEC-PERLE board. You have to decide early are you using Xilinx or Altera, what are the advantages and disadvantages of each. This presentation should outline the whole project ideas and deadlines, but not go to details.
2. Fredton Doan. Discussion of VHDL and other codes from the previous class project. Can they be used?
3. Loc Trieu. Discussion of Xilinx FPGA and design tools. Even if you select other platform, I would like to have a presentation of Xilinx chips, boards and tools.
4. Ryan Tang. Discussion of Altera chips, board and design tools. Even if you select other platform, I would like to have a presentation of Altera chips, boards and tools.
5. Van Lieu. Discussion of Lattice chips, board and design tools. Even if you select other platform, I would like to have a presentation of Lattice chips, boards and tools. This is your company, advertize it!!
6. PROJECT ONE. DEC-PERLE. Creation of a Fast Prototyping System by linking VHDL system and DEC PERLE-1 Board.
  
  THIS PROJECT IS TOUGH.
  
  THIS PROJECT IS ONLY FOR PEOPLE WHO LIKE SYSTEM ADMINISTRATION WORK AND HARDWARE.
  
  IT WOULD BE VERY HELPFUL FOR OUR LAB, BUT ONLY FOR VOLUNTEERS.
  
  This project will allow to fast prototype directly from VHDL. In the first phase students should learn the DEC-PERLE board. This is a continuation of last year projects. It is less on VHDL design and more on complete system integration using VHDL. The actual problems for test will be taken from homework 1. You will help to build the new Intelligent Robotics Laboratory.