PART 2
CLASS ORGANIZATION AND INTRODUCTION
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GROUPS AND PROJECTS.
We have additional meetings.
These meetings are open to everybody. At the beginning, we will
discuss some fundamental material from the class and review the background.
Next, class projects will be discussed, and finally new research
issues that may lead to M.S. and Ph.D. theses will be presented.
THREE GROUPS WILL BE CREATED, ACCORDING TO YOUR SKILLS:
1. INTRODUCTORY DESIGN GROUP.
digital design, VHDL, computer architecture, logic synthesis,
writing CAD software in C.
This option is for students who do not work in industry.
All projects will be relatively easy.
Petrick Function, Satisfiability Machine, Set Covering Machine.
Fibonacci Machine.
2. ADVANCED LOGIC DESIGN.
People from companies like Mentor Graphics, Synopsys,
software engineering types, good math background.
This group will be developing small new tools in logic synthesis,
high-level synthesis and system design, new VHDL-based designs, or
system-level software/hardware co-design concpets..
- functional decomposition of state machines and discrete functions.
We will learn in class about approaches that were created
by Ashenhurst and Curtis. Next we will learn new approaches that have been
recently investigated.
I was developing this software this summer for Wright Patterson Air Force Base
in Dayton, Ohio. Tools based on decomposition can be used both for
Machine Learning and FPGA design.
Question: How to convert them to hardware on our DECPeRLe-1 supercomputer.
- ABTECH's abductive networks synthesis.
AbTech Corporation developed a machine learning
approach that is competitive to neural nets. It is based on third degree polynomials on
three variables as basic cells. From a set of samples, a multilevel
network of cells is automatically constructed.
Question: How to convert them to hardware on our DECPeRLe-1 supercomputer.
- analog design automation
(development of new type of CAD software for
"Analog FPGA" called FPAA. Physical design, graph isomorphism, Analog VHDL).
Question: How to specify then in analog extensions of VHDL.
(Only for people who have skills in analog design).
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3. ADVANCED DIGITAL DESIGN.
People from Intel, Tektronix, Sequent - digital designers.
- PSUBOT
- intelligent wheelchair robot, voice-controlled, with sonars and camera, automatic
navigation, obstacle avoidance, and localization.
There are plenty of smaller VHDL-based design problems here.
- digital convolver
- (Xilinx FPGA-based processor).
This processor will execute 2D convolution of a pixel-based image with various kernels.
The kernels can be Sobel, Prewitt, median and other linear and non-linear arithmetical
filters, and also morphological operations.
- Hough Transform Processor (Xilinx FPGA-based processor).
This processor will convert 2D array of pixels to equations of straight lines.
Each equation of a line is a short vector to be stored in RAM.
- Sorter Absorber for Sum-of-Product functions (Xilinx FPGA-based processor).
- Exact ESOP Minimizer based on Search Counter and Generalized Helliwell Function.
(Xilinx FPGA-based processor).
- Cube Calculus Machine (image matching, microprogrammed unit with stack),
(Xilinx FPGA-based processor).
This processor will solve combinatorial problems
of logic and high-level vision, similar to maximum clique, Boolean Equations solving, and set covering
problems from the class.
One of the problems to be solved in to find isomorphism from a graph model to a graph scene representation.
This requires the fast solution to the maximum clique problem using stack-based
architecture.
- other, your design and choice (VHDL). (Xilinx FPGA-based processor).
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VHDL TOOLS.
We use Mentor, Cypress and Orcad tools at PSU (simulation and synthesis).
You can use your own tools at work, at least for a part of the project.
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PROJECT GROUPS AND PROJECT PRESENTATIONS.
It is recommended that groups of two or three students will be formed
for projects other than mini-projects.
PROJECTS PRESENTATION:
All students who will work on projects will have to present them
in the class. The datas will be announced.
WHAT IS VHDL.
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VHDL is a Hardware Description Language.
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It is used to document design of electronic systems and circuits.
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It is the first standarized language that has been successful. Earlier language, Conlan of IFIP, was a failure.
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VHDL was supported by US government.
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VHDL consists of several components:
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- the actual VHDL language,
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- Data type declarations (package STANDARD),
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- Utility functions (package TEXTIO - text input-output),
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- User designs (package WORK),
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- STD Library, including packages STANDARD and TEXTIO,
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- vendor packages,
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- vendor libraries,
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- user packages,
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- user libraries.
Development of VHDL was conducted by IBM, Texas Instruments and Intermetrics.
It started in 1983 after several years of introductory planning by large groups of
software and hardware designers.
The project was sponsored by Department of Defense (DoD).
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VHDL was ratified as IEEE standard 1076 in 1987.
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The language adoption was easier thanks to the existance of
a norm MILSTD 454L, which requires all ASIC (Application Specific Integrated Circuit)
designs developed for DoD to be described in VHDL.
ADVANTAGES OF VHDL.
A language of big breadth. This allows one language to be used for the
entire design process.
A single designer knowing VHDL can design and simulate a complete
system on many levels of description.
VHDL is a catalyst that allows designers to move up to an HDL design methodology.
Designer using VHDL becomes quickly much more productive than a classical designer
who uses schematic capture, or point languages such as ABEL or CUPL.
Design time is shortened.
Level of abstraction. VHDL allows to design on RTL (Register Transfer) level and
behavioral level, thus the designer thinks on the design concept level rather on
the component connecting level.
Design re-use.
Because the description in on a very
high level, it is technology independent. It can be then used to generate low-level
descriptions for many technologies.
High-level constructs can be translated to new technologies and re-used.
Improved quality of design.
The user can easily modify his high-level description, thus exploring a larger space of
solutions. Moreover, there are tools that will automatically generate many solutions,
generate solutions optimized with certain respect, and use automatic logic synthesis,
mapping or layout optimizations.
Combination of all above properties allows to obtain high-quality designs quickly.
Technology independent design.
Because of possibility of high-level description, selection of technology can be delayed
or changed in the last moment without essential redesign.
The designer needs not to be longer an "omnibus".
He has no longer to remember all details of ASIC vendors
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1. Contents: Contents and General Information.
3. Review: Finite State Machines.
4. Structural Descriptions of Hardware.
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