Standard Cell Design Style. In this methodology, the designer is provided with a predesigned library of cell layouts, called standard cells. These cells may be simple logic gates, such as NANDs, NORs, or complex modules like adders and flip flops. The cells are constrained to be of equal height, but they can be of varying width. Standard cells are typically placed in rows with cells butting against each other. This allows one to run common signals such as power and ground through the cells. In a typical design using standard cells, a desired function is realized by drawing the required cells from the standard cell library and describing their connectivity. The figure below shows a section of a standard cell layout.
Standard cell layout. $\begin{figure} \begin{center} \indent \psfig {file=Y_Standard_Cell_Layout.eps,width=5.00in}\end{center}\end{figure}$

The standard cell network is then fed into an automatic place and route system. The place and route system first places the cells in rows and routes the connections among then in the area between the rows. The space between two adjacent rows is called a channel. The active area of the device is limited to the rows. The channel area contains the overhead due to the wiring. A good place and route system attempts to produce as compact a layout as possible, by keeping the channel area to a minimum. In a standard cell layout, the channel area can be as high as 70% of the total area of the device. Hence, there is great need to build better place and route tools that could bring down the wiring overhead.