We are transitioning into an era where platform architectures need to address usage models ranging from cloud computing in the server domain to visual computing in the handheld domain. In this talk, I will describe a view of the 2015+ computing era with some application examples and motivate the need for innovative platform architectures to address the performance and power requirements. I will describe architectural challenges and solutions for building scalable and flexible platform architectures, touching upon: (a) manycore architectures for throughput computing, (b) accelerator integration for energy efficiency and scalar performance, (c) QoS-aware platform resource management, and (d) programmability of heterogeneous compute elements. The talk will summarize potential research directions as well as open issues for exploration.
Ravi Iyer is a Principal Engineer in Intel.s Corporate Technology Group. He is currently working on future SoC and CMP architectures, cache/memory hierarchies, interconnect fabrics, workload analysis and performance evaluation. He previously held positions in the Communications Technology Lab (working on IO acceleration research) and in the Enterprise Products Group (working on server architecture and performance). He received his Ph.D. in Computer Science from Texas A&M University. He has filed close to 20+ patents and has published about 95+ papers in the areas of computer architecture, networking and performance evaluation. He has participated in many journals, conferences and workshops as an associate editor (IEEE TPDS, ACM TACO), program committee member (MICRO, HPCA, PACT, ISPASS, etc) and co-chair (HPCA industrial track, CAECW, etc).