Selected Papers and Talks

• “Cortical Models onto CMOL and CMOS – Architectures and Performance/price,” Changjian Gao and Dan Hammerstrom, Submitted to IEEE Transactions on Circuits and Systems – I:  Regular Papers, a Special Issue Nanoelectronic Circuits and Nanoarchitectures, Nov. 2007,  PDF  (936KB)

• “Architectures for Silicon Nanoelectronics and Beyond,” Iris Bahar, Justin Harlow, Dan Hammerstrom, William Joyner, Clifford Lau, Diana Marculescu, Alex Orailoglu, and Massoud Pedram, to be published in IEEE Computer, January 2007 PDF  (280KB)

• “CMOL Based Cortical Models,” C.J. Gao and D. Hammerstrom, in book, Emerging Brain-Inspired Nano-Architectures, Editor Valeriu Beiu, In preparation  PDF

• "Biologically Inspired Architectures," Dan Hammerstrom, Submitted to Wiley-Series: "Nanotechnology", Book: "Information Technology", Editor: Rainer Waser  PDF  (338KB)

• "Vision-Based Hazard Detection," Chiu Hung Luk, Mazad Zaveri, Dan Hammerstrom, and Richard Kerr, ANNIE 07 PDF

• Intelligent Signal Processing with Nano-Electronics (Gomac85, ORNL/ARDA Workshop) Talk PDF

• Plenary Talk IJCNN 2004 (Budapest),  "Neural Networks, Now What?"  PDF (750KB)

• International Technology Roadmap for Semiconductors, Architecture Working Group White Paper, "Technology Scaling and Computer Architecture Implementations in Semiconductors," John Carruthers, Dan Hammerstrom, Bob Colwell, George Bourianoff, and Victor Zhirnov, August 2003.  PDF (236KB)

• “Reinforcement Learning in Associative Memory,” Shaojuan Zhu and Dan Hammerstrom, IJCNN 03, July 2003.  PDF (173KB)

• "Neural Net Based Processor for Robust, High-integrity Multisensor and Synthetic Vision Fusion," Kerr, J.R., Luk, C.H., Hammerstrom, D., Pavel, M., The 22nd Digital Avionics Systems Conference, 2003. DASC '03, Volume 2, Oct. 12-16, 2003, p. 9D41 - 9D412.  PDF (383KB)

• “Advanced integrated enhanced vision systems,” J. Richard Kerr, Chiu Hung Luk, Dan Hammerstrom, Misha Pavel, SPIE Aerosense, April 21-25, 2003; Orlando, Florida.  Specific Conference (no. 5081): Enhanced and Synthetic Vision.  PDF

• “FPGA Implementation Of Very Large Associative Memories - Scaling Issues,” Changjian Gao, Dan Hammerstrom, Shaojuan Zhu, Mike Butts, Chapter submitted for book, FPGA Implementations of Neural Networks, Ed. Amos Omondi, Kluwer Academic Publishers, Boston, 2003.  PDF (494KB)

• “Digital VLSI for Neural Networks,” Dan Hammerstrom, The Handbook of Brain Theory and Neural Networks, Second Edition, Ed. Michael Arbib, MIT Press, 2003.  PDF

• “Simulation of Associative Neural Networks,” Shaojuan Zhu and Dan Hammerstrom, Proceedings of the International Conference on Neural Information Processing, November 2002, Singapore .  PDF (109KB)

• Column written for Semiconductor Research Corporation (2001), "Cavin's Corner"

• “The Coming Revolution: The Merging of Computational Neural Science and Semiconductor Engineering” To appear in Toward Replacement Parts for the Brain, Ed. Ted Berger, MIT Press. PDF (74KB)

• "Computational Neurobiology Meets Semiconductor Engineering"  Dan Hammerstrom, Invited Paper Multi-Valued Logic Conference 2000, Portland OR May 2000, PDF (90KB)

• CNAPS Talk (1998)  PDF (353KB)

• “Comparing SFMD and SPMD Computation for On-Chip Multiprocessing of Intermediate Level Image Understanding Algorithms,” Steve Rehfuss and Dan Hammerstrom, Proceedings of the conference for Computer Architectures for Machine Perception 1997, Boston MA , October 1997.  PDF (217KB)

• "Image Processing Using One-Dimensional Processor Arrays," Dan Hammerstrom and Dan Lulich, The Proceedings of the IEEE, Vol. 84, No. 7, July 1996, pp. 1005-1018.  PDF (473KB)

• “Model Matching and Single Function Multiple Data Computation (SFMD),” Steve Rehfuss and Dan Hammerstrom, Advances in Neural Information Processing Systems 8, NIPS, Denver, CO, November 27-30, 1995, pp 713-719.  PDF (613KB)  DjVu (86KB)

• "A Digital VLSI Architecture for Real World Applications," Dan Hammerstrom, An Introduction to Neural and Electronic Networks, Electronic Networks, Edited by Steven F. Zornetzer, Joel L. Davis, Clifford Lau, and Tom McKenna, Academic Press, 1995.  PDF (578KB)

• "Techniques for the Efficient Execution of Sparse Matrix Neural Network Algorithms on SIMD Machines" Dan Hammerstrom, Adaptive Solutions Technical Report, 1994  PDF (104KB)

• "Working with Neural Networks", Dan Hammerstrom, IEEE Spectrum, July 1993, pp. 46-53.  PDF (645KB)

• "Neural Networks At Work", Dan Hammerstrom, IEEE Spectrum, June 1993, pp. 26-32.   PDF (396KB)

• "Why VLSI Implementations of Associative VLCNs Require Connection Multiplexing," Jim Bailey and Dan Hammerstrom, Proceedings of the 1988 International Conference on Neural Networks, pp. 173-180, San Diego  PDF (165KB)

• "The Connectivity Requirements of Simple Association, or How Many Connections Do You Need?", D. Hammerstrom, 1987 IEEE Conference on Neural Network Information Processing, pp. 338- 347.  PDF (1,100KB)

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