Satisfiability Modulo Theorys - SMT Provers

An important type class of theorem provers are called SMT provers. A SMT prover combines satifiability (over boolean formulas) with other theories (such as theories of linear arithmetic, arrays, lists, etc.). These have many applications in areas such has hardware design and software verification.


In this lecture we will do three things
  1. Get an overview of how SMT provers work. Using the notes of Johannes Kanig.
  2. Get an introduction to using a real SMT solver Yices.
  3. Apply Yices to a real problem, test generation, in a toy domain (a while language), that illustrates how SMT provers are used to analyze software.

Basic Skills

In order to use a SMT-prover, you will need to understand how to do the following basic tasks:

In my experience there were two invaluable resources for learning to do this.

I suggest you study these, and the example we will look at in the lecture.

Installing and using Yices.

We will be using Yices as our SMT-prover. Basic tasks and skills you will need to accompish.

Generating input parameters to increase test coverage.

The Problem: (summarized from a talk by Leonardo de Moura and Nikolaj Bjørner.


SMT-COMP is an annual competition that challenges the developers of SMT solvers to improve their solvers. In order to allow multiple solvers to solve a common set of problems, a standard language, SMT-LIB, has been developed that competing solvers must support. The input and output to SMT solvers usually conforms to this standard. A reference for users who wish to learn how to format SMT input in the SMT-LIB format is the SMT-LIB tutorial. More information about resources available for SMT-LIB can be found here.

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