PORTLAND
QUANTUM
LOGIC
GROUP



PORTLAND QUANTUM LOGIC GROUP PAPERS TO READ. INCLUDING OUR PAPERS.

1. Logic Synthesis using Reversible Gates
             Pawel Kerntopf, Technical University of Warsaw
                
PDF
2. Design of Low Power CMOS Circuits with Energy Recovery,
              Xunwei Wu, Ningbo University, Ningbo, People Republic of China,
              Guoqiang Hang,
              Zhejiang University, Hangzhou, People Republic of China,
              and Massoud Pedram, University of Southern California, USA.
                
PDF
3. Reversibe Energy Recovery Logic Circuits and Its 8-Phase Clocked Power Generator
for Ultra-Low-Power Applications
              Joonho Lim, Dong-Gyu Kim, and Soo-Ik Chae, Seoul National University, Korea.
                
Postscript
4. Regularity and Symmetry as a Base for Efficient Realization of Reversible Logic Circuits
              Marek Perkowski, Portland State University, USA,
              Pawel Kerntopf, Technical University of Warsaw, Poland,
              Andrzej Buller, ATR, Japan,
              Malgorzata Chrzanowska-Jeske, Portland State University, USA, 
              Alan Mishchenko, Portland State University, USA, 
              Xiaoyu Song, Portland State University, USA, 
              Anas Al-Rabadi, Portland State University, USA, 
              Lech Jozwiak, Technical University, Eindhoven, The Netherlands,   
              Alan Coppola, Cypress Semiconductor Northwest,
                


Postscript

20 PDF slides from IWLS, Lake Tahoe
5. Logic Design and Quantum Challenge
              Victor I. Varshavsky, University of Aizu, Japan.
                
PDF
6. Nano-computer built on a Internet.
              R. Colin Johnson
                
HTML
7. Algorithms for Quantum Computation: Discrete Logarithms and Factoring.
                Peter Shor 
                
Postscript
8. Polynomial-Time Algorithms for Prime Factorization 
and Discrete Logarithms on a Quantum Computer.
                Peter Shor 
                
Postscript
9. Programmable quantum gate arrays
                M.A. Nielsen and Isaac L. Chuang
                
Postscript
10. Quantum Error Correction Via Codes Over GF(4).
                A.R. Calderbank, E.M. Rains, P.W. Shor, and N.J. A. Sloane
                
Postscript
11. A Simple Quantum Computer
                Isaac L. Chuang and Yoshihisa Yamamoto
                
Postscript
12. Slides from ULSI'2001 Tutorial and "embedded paper" in Warsaw.
                Marek Perkowski et al.
                
PDF
13. Paper about General Logic Decomposition method for reversible logic from Reed-Muller'2001 Workshop.

PART I.
                Marek Perkowski et all,
                
PDF
14. Paper about General Logic Decomposition method for reversible logic from Reed-Muller'2001 Workshop.

PART II.
                Marek Perkowski et all,
                
PDF
15. Paper of Pawel Kerntopf about generalization of Shannon Expansion. RM'2001.
                Pawel Kerntopf.
                
PDF










  • ABSTRACTS
    1. Paper from Korea on CMOS realization or RL. HTML


    Contact Address:
    Marek Perkowski
    Department of Electrical and Computer Engineering,
    Portland State University,
    1800 SW 6th, Room 102,
    P.O. Box 751,
    Portland, Oregon 97207-0751, USA.
    tel. (503) 725-5411