9th Post-Binary ULSI Workshop, Friday, May 26, 2000

8:10 - 8:15

Opening Remark

Takao Waho, Sophia University, Japan


Session 1: New Algorithm and Logic Design

Chair: O. Ishizuka, Miyazaki University, Japan

8:15 - 8:55

Beyond-Binary Arithmetic Algorithms and Implementations

Takafumi Aoki and Tatsuo Higuchi, Tohoku University, Japan

8:55 - 9:35

Multiple-valued Threshold Logic: Past, Present and Future

Claudio Moraga, University of Dortmund, Germany

9:35 - 10:15

Disjoint Bi-Decompositions of Boolean Functions in the Walsh Spectral Domain

Bogdan J. Falkowski and Sudha Kannurao, Nanyang Technological University Temasek Polytechnic, Singapore


10:15 - 10:30 Break


Session 2: LSI Circuits and Devices

Chair: T. Waho, Sophia University, Japan


10:30 - 11:10

Multiple-Valued Logic-in-Memory VLSI and Its Application

Takahiro Hanyu and Michitaka Kameyama, Tohoku University, Japan

11:10 - 11:50

Development of Negative Differential Resistance (NDR) Devices for Multiple-valued

Circuit Application

T. Uemura, NEC, Japan

11:50 - 12:30

Design of Multiple-Valued Logic Circuits Using Neuron-MOS Transistors

Koichi Tanno and Okihiko Ishizuka, Miyazaki University, Japan


12:30 Closing