<strong> POST-BINARY LSI SYSTEMS: PRESENT STATUS AND FUTURE CHALLENGES. </strong>

9^th POST-BINARY ULSI WORKSHOP, FRIDAY, MAY 26, 2000

8:30 - 8:40 Opening Remarks.

Takao Waho, Sophia University, Japan

SESSION 1: INVITED LECTURE

Chair: Takao Waho, Sophia University, Japan

8:40 - – 9:40

Post-binary LSI systems: Present Status and Future Challenges

Pinaki Mazumder, University of Michigan, USA

9:40 - – 10:00 Break

SESSION 2: NEW ALGORITHMS AND LOGIC DESIGN.

Chair: O. Ishizuka, Miyazaki University, Japan

10:00 - – 10:40

Beyond-Binary Arithmetic Algorithms and Implementations

Takafumi Aoki and Tatsuo Higuchi, Tohoku University, Japan

10:40 - – 11:20

Multiple-valued Threshold Logic: Past, Present and Future

Claudio Moraga, University of Dortmund, Germany

11:20 - – 12:00

Disjoint Bi-Decompositions of Boolean Functions in the Walsh Spectral Domain

Bogdan J. Falkowski and Sudha Kannurao, Nanyang Technological University Temasek Polytechnic, Singapore

12:00 - – 13:00 Lunch

SESSION 3: LSI CIRCUITS AND DEVICES

Chair: P. Mazunder, University of Michigan, USA

13:00 - – 13:40

Multiple-Valued Logic-in-Memory VLSI and Its Application

Takahiro Hanyu and Michitaka Kameyama, Tohoku University, Japan

13:40 - – 14:20

Development of Negative Differential Resistance (NDR) Devices for Multiple-valued

Circuit Application

T. Uemura, NEC, Japan

14:20 - – 15:00

Design of Multiple-Valued Logic Circuits Using Neuron-MOS Transistors

Koichi Tanno and Okihiko Ishizuka, Miyazaki University, Japan

15:00 Closing