3. CONFERENCES RELATED TO TEST, TEST GENERATION, DESIGN FOR TEST, ETC.

1991

• ITC91: Table of contents International Test Conference IEEE Comp. Soc. Nashville, TN. USA. Oct. 1991. Table of contents. It is connected to german search engine so you can find all papers written by the author. Very useful. This search engine is useful in intself not only in test, but in other areas to look for papers if you know an author.

  1992

  1993

  1994

• ReportThe Seventh IEEE International ASIC Conference and Exhibit. A Report on ASIC'94.
• Mentor Users Group - PCB Technical SessionDesign for Manufacturing/Design for Test. Socket Use in Circuit Card Assembly (CCA) Michael B. Baker - GTE. Abstract.

  1995

• ATS '95The Fourth Asian Test Symposium (ATS '95) Table of Contents. Links are to abstracts. SESSION 1 -- Systems Test. Distributed Off-line Testing of Parallel..
• ATS-95 PROGRAM. Fourth Asian Test Symposium.India. November 23-24, 1995.
• Author/Panelist Index DAC'95
• ATS '95 Proceedings of fourth Asian Test Symposium, abstracts.
• Table of Contents EDT '95 Organising and Programme Committee Keynote Speakers Welcome Address Tutorials Best Paper Awards.
• BAST 1995 Workshop The Fifth CRC-IEEE BAST Workshop. February 7-10, 1995. Bodega Bay, California. Guest Speaker. Technical Program. Gifts, Food and Entertainment.
• RASSP Conference AgendaPreliminary Agenda. 2nd Annual RASSP Conference. July 24 - 27, 1995. Monday July 24. RASSP TUTORIAL DAY. 8:30 - 5:00 VHDL Based, Top-Down, Virtual...

  1996

• Third International Test Synthesis Workshop Santa Barbara, CA, USA May 6-8, 1996
• Third International Test Synthesis Workshop - Call for ParticipationThird International Test Synthesis Workshop. Red Lion Resort, Santa Barbara, CA, USA May 6-8, 1996. THE SAME?
• Third International Test Synthesis WorkshopThird International Test Synthesis Workshop. Red Lion Resort, Santa Barbara, CA, USA May 6-8, 1996
• ICCD '96 Program
• 2nd IEEE International Mixed Signal Testing Workshop 2nd IEEE Intern. Mixed Signal Testing Workshop. General Chair , Bozena Kaminska, Quebec City, May 1996. List of papers.
• Author Index ED&TC '96 All authors of the European Design and Test conference in 1996. Several papers from LIRMM were presented there. Papers available in Postscript.
• Montpellier 96 Call for Participation. IEEE European Test Workshop. Montpellier (Hotel la Corniche in Sete), France June 12-14, 1996.

  1997

• AUTOTESTCON '97 Call for Papers September 22-25, 1997 / Anaheim, CA. PRELIMINARY CALL FOR TECHNICAL PAPERS.
• IEEE TC-FTC =*= FTCS-28 =*= Call For Papers Fault Tolerant Computing Conference. List of people in Fault Tolerant Computing as a starter.
• cab-event-entry: EWDC-8 Advance Program Eighth European Workshop on Dependable Computing (EWDC-8), EXPERIMENTAL VALIDATION OF DEPENDABLE SYSTEMS, April 2-4, 1997, Göteborg, Sweden List of papers.
• http://normate.tet.uni-hannover.de/public/online97.htm 3rd IEEE International On-Line Testing Workshop Sofitel Capsis Beach Resort, Aghia Pelaghia headland, Crete, Greece July 7-9, 1997 The increased complexity of electronic systems has seen increasing reliability needs in various application domains as well as pressure for low cost products. There is a corresponding increased demand for cost-effective on-line test techniques.
• "http://www-uk.research.ec.org/cabernet/events/arc-date/msg00034.html"
• ETW'97: IEEE European Test Workshop - Call for papers.Prev][Next][Index] ETW'97: IEEE European Test Workshop - Call for papers. From: prinetto@chiusella.polito.it (Paolo Prinetto) Date: Tue, 07 Jan 1997...
• ETW'97: IEEE European Test Workshop - RemindPrev][Next][Index] ETW'97: IEEE European Test Workshop - Remind. Subject: ETW'97: IEEE European Test Workshop - Remind. From: prinetto@chiusella.polito.it.
• ETW'97: Advance Program and Registration informationPrev][Next][Index] ETW'97: Advance Program and Registration information. From: prinetto@chiusella.polito.it (Paolo Prinetto) Date: Tue, 15 Apr 1997...
• IOLTW'97: Advance Program and RegistrationPrev][Next][Index] IOLTW'97: Advance Program and Registration. From: prinetto@chiusella.polito.it (Paolo Prinetto) Date: Thu, 22 May 1997 20:32:29 +0200...
• Call for papers, Distributed Algorithms Conference
• Reine Mathematik (und Titel der angewandten Mathematik und Informatik LIST OF BOOKS
• IIS Library : February in 199703-12-1997 Upd
• http://griao.iro.umontreal.ca/Int_conf/VTS97_VLSI_TEST_SYMP.html Call for papers of 1997 IEEE VLSI Test Symposium, with links to Dr. Zorian, one of top test people now.
• VLSI'97 Conference Call for papers of IFIP Intern. Conf. on VLSI. I had contact with this group in France. They work on test.

  1998

• ETW98IEEE. Computer. Society. Universitat. Politècnica. Catalunya. ETW'98. IEEE European Test Workshop. Sitges, Barcelona SPAIN. May 27-29, 1998...

4. ALL BIBLIOGRAPHIES AND REFERENCE MATERIALS.

BIBLIOGRAPHIES

• Design for Test Group Bibliography Home. Products. Press. Papers. Techno.Corporate. What's. Bibliography. Mentor Graphics Design-for-Test Group members.
• Design for Test Group Bibliography From Mentor Graphics. Links to many interesting Mentor tools descriptions for test. BIST, ATPG, Fault Simulation.
• June 1996 Bibliographies Publications from SRC. Only names and numbers, test, manufacturing, fabrication. Other interesting links to SRC, which is one of top USA places related to test.

BOOKS, PUBLICATIONS AND LISTS.

• 1995 Bibliographic List of SRC PublicationsSRC Publications: 1995 Bibliographies. Information for each month is organized by SRC program area. For your convenience, the most recent months are...
• AskMe.com Security Index . LIST OF SECURITY PRODUCTS AND SERVICES. INDEXED. [A] [B] [C] [D] [E] [F] [G] [H] [I] [J] [K] [L] [M] [N] [O] [P] [Q] [R] [S] [T] [U] [V] [W] [X] [Y] [Z]

  BOOKS ON TEST

• HP 8110A - List of published Literature8110A. List of published Literature. data sheet/Brochure Partnumber: 5964-6335 Application Brief "Digital Testing under Real-World Conditions" Partnumber:
• Computing IEE Books. Computing series. (Series Editors: Dr. B. Carré and Dr. D.A.H. Jacobs)
• 1996 Publications in Design SciencesSRC Publications: 1996 Publications in Design Sciences. C96001 Synthesis of Application-Specific Memory Designs (Journal Preprint); H. Schmit and D. E....
• NewsGroupArchives Sep92.
• September 1995 Bibliographies
• April 1996 Bibliographies
• Durability, Inc.- Book by Robert Witte about Electronic Test Instruments - Theory and Applications. Prentice Hall.
• ComputingIEE Books. Computing series. (Series Editors: Dr. B. Carré and Dr. D.A.H. Jacobs)

  BOOKS ON VERIFICATION

  • Theorem Provers in Circuit Design - Theory Practice and ExperienceComputer Science, Formal Logic, Hardware Verification. For research and development professionals.- Level: Proceedings. R. Kumar, Forschungszentrum...
  • Principles of Semiconductor Network Testing - Forward- Amir Afshar. Foreword | Preface | Table of Contents | To Order This Book | First Chapter, Part One

  ULTRASONIC TESTING ENCYCLOPEDIA

  • UT Encyclopedia Index Well organized and interesting, but not digital or analog test in general sense. Worth reading.

  SIGDA BULLETINS.

  • SIGDA Project Reports - Part 1 SIGDA Bulletin with info on CD-ROM projects and new journal. Interesting.

5. UNIVERSITY RESEARCH RELATED TO FAULT MODELS, TEST GENERATION AND TESTING.

UNIVERSITY RESEARCH IN USA

• VLSI Testing, Synthesis and Verification Group From Univ. Ca. Santa Barbara, prof. Kwang Cheng.
• Digital Systems Group Digital Systems Group of Faculty from Auburn Univ. VLSI Projects completed, chips, CAD tools. 4 Associate Professors colaborate.
• 02.Computer-Aided Design List of current research projects from U.C. Berkeley, also test related, mostly CAD and digital design. Very interesting.
• Publications of Dr.Chung Patent Applied. A Digital Microelectronics Circuit Package for Audio Indication of Circuit Failure from Built-In Self Test.
• VLSI design and test group's research pageResearch Papers. Parallel Simulation. Data Parallel Fault Simulation (ICCD '95) Data Parallel Fault Simulation for Sequential Circuits (ISCAS '96)...
• 1995 CPS Faculty PublicationsDepartment of Computer Science. 1995 Faculty Publications. B. Cheng. D. F. Robinson, D. Judd, P. K. McKinley, and B. Cheng, "Efficient Collective Data...
• VLSI design and test group's research pageResearch Papers. Parallel Simulation. Data Parallel Fault Simulation (ICCD '95) Data Parallel Fault Simulation for Sequential Circuits (ISCAS '96)...
• PublicationsPatent Applied. A Digital Microelectronics Circuit Package for Audio Indication of Circuit Failure from Built-In Self Test, Dec. 1994, (with M. Dukes).

RESEARCH IN FRENCH UNIVERSITIES

RESEARCH IN LIRMM

• DEA SYSTEMES AUTOMATIQUES ET MICROELECTRONIQUE WEB page of LIRMM in Montpellier where I spend my sabbatical. Start to all links to test group, publications, facutly, etc. Look there.
• ADAM - MONTPELLIER This is a list of related research projects from LIRMM. Each of them shows faculty advisor and student. Ongoing. This helps to learn what they are doing. In French, but easy to understand.

  PASCAL NOUET FROM LIRMM

  • LISTE DES PUBLICATIONS RELATIVES AUX TRAVAUX DE PASCAL NOUET List of publications of Pascal Nouet. This is one of the people I told you about. He is very nice, helpful, speaks good English, and is expert in testers. This is his list of publications.0

6. DESIGN FOR TESTABILITY

LOGIC DESIGN FOR TESTABILITY

• Design for Testability Research projects from U. Ca. Santa Cruz. See around. SCTest Project. Machine Learning.

BEHAVIORAL DESIGN FOR TESTABILITY

• Behavioral-Level Considerations for Design for Testability and Test Generation This is a complete thesis from the University of Texas in AUstin.

BIST

• Mentor Graphics LBISTArchitect Press Release Commercial short info

BOUNDARY SCAN

• Texas Instruments IEEE 1149.1/JTAG/Boundary Scan Explanation of product families and standards.

7. VERIFICATION

HARDWARE VERIFICATION

• Typed CIRCAL: A High Level Framework for Hardware Verification George Milne from Napier Univ. in UK. Project description.

SOFTWARE VERIFICATION FOR IMAGE PROCESSING

• Verification and Test Concept From Spain. Software verification of a system for image processing.

SYSTEM LEVEL VERIFICATION

• VLSI Design and System Level Verification for the Mini-Disc ASIC Verification, paper from Japan, DAC 96.
• Testing, Verification & Validation From TekSci, a software services company. Software,hardware, system test.

CHRYSALIS - THE FIRST FORMAL DESIGN AND VERIFICATION COMPANY.

• Chrysalis Symbolic Design - The Formal Design Company Chrysalis company web page.
• Design EXPLORE--Interactive Formal Verification First and famous already interactive formal verification tool.

RECURSIVE LEARNING

• Recursive Learning: A New Implication Technique for efficient Solutions to CAD-problems: Test , Verification and Optimization A paper of Wolfgang Kunz and Dhiraj Pradhan. Very Interesting and related very much to my research. I need to read more. Postscript file.

BERKELEY RESEARCH IN HARDWARE VERIFICATION

• http://diva.eecs.berkeley.edu/~cadsrc/REVIEW/fv.review.agenda Research of Prof.Brayton in Verification, recent.

JOURNALS IN TEST, DESIGN FOR TEST, FAULT MODELS, VERIFICATION AND IN THESE ISSUES, AS RELATED TO DESIGN.

• Contents ED&TC '94
• IEEE D&T: Tables of Contents, Past Issues
• D&T 1995 Index
• D&T: Abstracts - 1995 Abstracts from this journal, 1995.

TEST GENERATION.

• Diagnostic Test Pattern Generation Part of a complete report/thesis from UCSC.
• The Test Connection's Home Page Test equipment company home page.
• AltaVista: Simple Query "Design for Test"

SEMINARS

• Design for Test Seminar The cost of using silicon without Boundary-Scan can be larger than you think. Learn how to lower your design's life-cycle costs with Boundary-Scan. SYNOPSYS.

UNIVERSITY-INDUSTRY CENTERS

• List of LogicVision Software Public RASSP PapersSelected A RASSP Technical Participant: CAD Framework Initiative. COMPASS. Georgia Institute of Technology. HONEYWELL. GM-HUGHES. INTERMETRICS, Inc. CAD tool for BIST. Vinod Agrawal. superv.
• Design & Test Center UNIVERSITY/INDUSTRY CENTER FROM ESTONIA!

CONSULTING SERVICES

• Reputation and Scope of Expertise SEI engineers have design experience in a variety of markets. SEI maintains a reputation for the successful execution. Design for test company.
• Viewlogic Technical Services Viewlogic Education Services Schedule for Marlboro, MA & Fremont, CA & Orlando, FL. For more information, please contact Viewlogic Education Services. Classes taught in 1997 in various places.
• Viewlogic Educational Services Classes taught by ViewLogic. Also test. Mostly design.

INDUSTRIAL PRODUCTS

• HILEVEL Technology, Inc. Updated August 29, 1996. Home of Digital Testing Solutions. Low Cost/High Performance chip and board testers. HILEVEL Technology offers a line of High..
• Avila Test Engineering ATE company, USA.
• A High Throughput TCAD System to Support 8” Fablines Desgin for Manufacturing. Silvaco International.
• CIRCUIT BOARD TEST Manufacturer of test fixtures. USA.
• BNR Chooses LogicVision's ASICTEST Solution NEWS RELEASE. Customer contact: Carolyn Boone Corporate Communications Manager LogicVision, Inc.
• News 11/26/96 Zilog and Hirotech to Develop User-Friendly Graphical Interface.
• «Ê­±¬G¨Æ«Ê­±¬G¨Æ. CADENCE¯q µ
• RASSP Acronyms
  ACO Administrative Contracting Officer ACL Agent Communication Language ACRN Accounting Classification Reference Number

  3Com Europe Ltd - Company PageCom is one of the world’s largest and fastest-growing datanetworking companies, providing LAN and WAN solutions for a broad range of organisations.

  Mentor Graphics DFT home pageCisco Systems wanted to achieve the highest quality levels for their design and be the first to market - a significant challenge.

INDUSTRIAL PRODUCT-RELATED CONFERENCES

• AUTOTESTCON '97 Call for PapersAUTOTESTCON '97. September 22-25, 1997 / Anaheim, CA. PRELIMINARY CALL FOR TECHNICAL PAPERS.

INDUSTRIAL COMPANIES, WEB PAGES AND PRODUCT ANNOUNCEMENTS.

LTX Corp.

• LTX CORP. 1995 Annual ReportAnnual Report 1995. Corporate Profile. Financial Highlights. Presidents' Letter. Mixed Signal Testing. Digital Testing. Discrete Testing. Customer Service.

CREDENCE

• Press ReleasePress Release. Credence Corporation.

ALTERA

• Altera PCI Target Application Altera PCI solution: a shrink-wrapped package. Selecting the best solution for your design. PCI-compliant devices. PCI megafunctions.

TEXAS INSTRUMENTS

• Texas Instruments IEEE 1149.1/JTAG/Boundary Scan Texas Instruments offers a wide range of silicon, tools, and educational products. Using DFT in ASICs.

SYNOPSYS

• Alphabetical Product Listing ACE AMPS Arcadia ARKOS Behavioral Synthesis Behavioral Compiler Bus Interface Models Cell-Based Array (CBA). Several Tools for test from SYNOPSYS.
• Synopsys Web Contents Page with links to all SYNOPYS tools.
• How to Avoid Surprises Using Synopsys Test Compiler Article by Synopsys author.
• SYNOPYS Courses in Europe. In German.
• SmartModel Library DatasheetSmartModel Library Datasheet. Behavioral Models for Board and System Simulation. Superior Models. Effective simulation of ASICs, boards and systems...
• Software ModelsBehavioral Models for Board and System Simulation
• Synopsys Web Contents Search Engine for the Synopsys Web Site. Enter keyword(s): Click here for help on searching.
• SNUG '96 Information Synopsys invites you to the Sixth Synopsys Users Group (SNUG) Conference
• Test Generation Solutions Using ATPG Software Test Generation Solutions Using. ATPG Software, Accelerators and Services. Overview.

DIAGONAL SYSTEMS

• DS Diagonal Systems Company BestBench product - to solve the verification Bottleneck.

MENTOR

• Consulting Services Home. Products. Press. Papers. Key Tech.Corporate. What's. New, Mentor. Mentor Graphics Professional Services help renew electronic design.
• AltaVista: Simple Query +Janusz +Rajski Janusz Rajski. Nie ma web page?
• Design for Test from Mentor.
• Mentor Graphics DFT home page Cisco Systems wanted to achieve the highest quality levels for their design and be the first to market - a significant challenge.
• Mentor Graphics What's New nbsp;Hot Products.  Design Creation.  Design and Process  Tools.  Design-for-Test.  IC Design.  Intellectual Property....
• Synopsys Web ContentsBrowse through Contents. Alphabetical Product Listing. Synopsys Website Table of Contents (first 3 levels) What's Hot! Announcements. Press Releases....
• RAM BIST Release.3.word5FOR IMMEDIATE RELEASE. For more information, contact: Jennifer Guimond Public Relations KVO, Inc.

VHDL VERIFICATION

• Bibliography on VHDL Verification

HARDWARE VERIFICATION RESEARCH GROUPS AT UNIVERSITIES.

HARDWARE VERIFICATION RESEARCH GROUPS AT USA UNIVERSITIES.

• Hardware Verification Group Group of Prof. Dill from Stanford. Research and Publications.

VHDL VERSUS TEST.

• Formal Hardware Verification of VHDL ModelsFormal Hardware Verification of VHDL Models. by Michael P. Nassif. As the complexity and level of integration of systems on a single chip grows, the life..
• The Larch/VHDL Methodology for Hardware VerificationThe Larch/VHDL Methodology for Hardware Verification. by Michael P. Nassif. A contractual effort is currently underway between the US Air Force's Rome...
• Selected publications in hardware verificationSelected publications in hardware verification. 1. Mark Bickford. A Formal Semantics for VHDL and its Use Towards Verifying a Large Design, December 1992..
• EE295 - ASIC Design Using VHDLEE295 - ASIC Design Using VHDL. Test Survey. Assignment: "Level-Sensitive Scan Design (LSSD) Provides Benefits for Testability and Product Development",...

ANALOG AND MIXED TEST

• LIST OF TUTORIALSList of Tutorials. 39th Midwest Symposium on Circuits and Systems Iowa State University, Ames, Iowa , August 18-21 1996 Revised: July 5, 1996
• TODAY'S ISSUE: Program for International Mixed Signal Testing Workshop
• IN THIS ISSUE: INTERNATIONAL MIXED-SIGNAL TESTING WORKSHOP organized by IEEE Test Technology Technical Committee
• Valentino Liberali - papersPre-print of conference paper: A. Richardson, T. Olbrich, V. Liberali, F. Maloberti: "Design-for-Test strategies for analogue and mixed-signal integrated..
• DeptEEE : Teaching : Postgrad : MSc : EE453 : PLDs and ASIC Design :

INTERNET RESOURCES

• No TitleBRICS Notes Series, 1996 March 4, 1997 This document is also available as PostScript, DVI, Text. References [NS-96-15] Abstract, PostScript, PDF, DVI...
• Reliability of TCP/IP and the InternetReliability of TCP/IP and the Internet. Matthew Bennett Design for Test and Reliability 525.778 13 August 1996. Table of Contents: 1. The Origin Of The...
• No TitleSubject: Internet Simulation-Related Resources. ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ From: Steve Strickland. Newsgroups:

INDUSTRIAL LITERATURE

• Art of Programming Embedded SystemsDone][Image][Last][Next] Text (6 of 128) in Annabooks Bookstore. 11838 Bernardo Plaza Court San Diego, CA

INDUSTRY RESEARCH

• LogicVision - Receives 3 Million In Funding From Leading Venture Capital FirmNEWS RELEASE. For Immediate Release. Customer contact: Carolyn Boone Corporate Communications Manager LogicVision, Inc.
• Electronic Design.September 1996 Mentor tools for testability, ASIC.

RASSP

• COTS PaperLockheed Martin Advanced Technology Laboratories RASSP Second Year Overview. James E. Saultz Lockheed Martin Advanced Technology Laboratories Camden, NJ...
• List of LogicVision Software Public RASSP PapersSelected A RASSP Technical Participant: CAD Framework Initiative. COMPASS. Georgia Institute of Technology. HONEYWELL. GM-HUGHES. INTERMETRICS, Inc. JRS.
• RASSP Conference Agenda
• COTS PaperLockheed Martin Advanced Technology Laboratories RASSP Second Year Overview. James E. Saultz Lockheed Martin Advanced Technology Laboratories Camden, NJ...

MILITARY RESEARCH

• file:///Untitlednbsp;Integrated Diagnostics for Multi-Chip Module (MCM) Technologies, Chip-to-System Testability. Christopher J. Flynn, RL/ERDD. (315) 330-3249, DSN:...

COURSES BY COMPANIES

• Viewlogic Educational ServicesCURRICULUM. December 1996 - July 1997. Viewlogic offers a wide range of courses/consulting, covering the basic design tools to the most advanced tools.
• The Institute for Managerial LeadershipThe University of Texas at Austin presents. The Institute for Managerial Leadership. for Engineers, Computer Professionals, and Scientists.

VIEWLOGIC

• Viewlogic Engineering OpportunitiesMay, 1996. VIEWLOGIC SYSTEMS INC. OPPORTUNITIES. East Coast. West Coast. VIEWlogic Systems, Inc. VIEWlogic Systems, Inc. 293 Boston Post Road West. 47211
• Viewlogic Engineering OpportunitiesMay, 1996. VIEWLOGIC SYSTEMS INC. OPPORTUNITIES. East Coast. West Coast. VIEWlogic Systems, Inc.
• Viewlogic Educational ServicesCURRICULUM. December 1996 - July 1997. Viewlogic offers a wide range of courses/consulting, covering the basic design tools to the most advanced tools.

PRODUCTS FROM COMPANIES

• LOCUS, Inc. - Product Development and Project ManagementPROJECT MANAGEMENT. Client Interface Contract Issues Schedule Accountability Cost Accountability Resource Allocation Weekly Meetings Client Review...

SMALL COMPANIES. CONSULTINGS

• Alphatec GroupFor instant access anywhere within the Alpha-Group Web-Site. Home Page. The Group. Wafer Fabrication. Submicron Technology. More Information on Submicron..
• Alphatec GroupEstablished 1993. Bangkok, Thailand and Santa Clara, California. Provide management and strategic direction for a group of separately financed and....
• Torrent Vector Microprocessor Makes DebutTorrent Vector Microprocessor Makes Debut. From the ICSI newsletter, Spring 1995, Volume 8, Number 1. Early on the morning of April 14, 1995, a new vector.
• DOUG MARKS ASSOCIATES, LLC -- PRODUCTS -- MicrocadamDoug Marks Associates, LLC is committed to penetrating the CAE/CAD/CAM market with the most innovative, quality based design tools and services available.
• DS Diagonal Systems - BestBench

DIGITAL TESTING EQUIPMENT

• Digital Testing Link to LTX company (HOME), which produces test equipment.
• Digital Testing Equipment Link to Hekimian Laboratories. Another test equipment company.
• HITEN: Reliability and Testing Page HITEN is high temperature test company.
• Digital Testing EquipmentDigital Testing. Hekimian offers a number of digital testing solutions for DS1, DS3, and DDS testing. For more information, click on one of the test..
• Digital TestingDigital Testing. As the demand for technology accelerates and production costs decrease, the microprocessor cores of yesterday have quickly become the..

DIGITAL TESTING SERVICES

• ALPHATEC GROUP WEB PAGE Digital Testing Services company for Integrated Circuits.
• more info on dtsBusiness. Custom IC test services. Key Test Services. Test program generation. Electrical test characterization. Wafer sort production test.
• Hekimian ProductsHekimian Laboratories, Inc., was founded in 1968 to develop and manufacture telecommunications test equipment.
• KTL's Digital Testing ServicesHome Page] [Index ] [Comments] [Previous] [Next] Introduction. Our digital testing services enable our clients to gain comprehensive access to European...
• KTL's Home Page - Specialising in Analogue, EMC, Safety and Digital Testing
• Alphatec GroupHigh Speed Burn-In and Temperature/ Humidity Testing Accelerate Test Process, Reduce Customers' Costs. SANTA CLARA, Calif., July 8, 1996 - Digital Testing.

MAGAZINES

• Test Labs/Services Buyers' GuideEE-EVALUATION ENGINEERING Magazine

BROADCAST ARCHITECTURE

• No TitleIn December, 1995, Evergreen Media commissioned Mark Ramsey and Nova Marketing to conduct a massive perceptual study of New York City to identify possible.
• Broadcast Architecture: Mix-MasterMix-Master ® Digital Testing. The most accurate and effective auditorium testing available, Mix-Master® provides not only song scores, but a..
• Broadcast Architecture:Consulting ServicesConsulting Services. Broadcast Architecture offers consulting services to radio and television stations around the world. Among our clients are such..

TEST CHIPS

• No TitleCenter for R1 ~1 TECHNICAL ella~le . D C Dr~ DT Cømputlng r~ ~ r ~J n An Experimental Chip to Evaluate Test Techniques Part 1: Description of Experiment...

RESEARCHERS

• Dr Trevor A YorkThe Department of Electrical Engineering and Electronics. Dr Trevor A York, BSc, PhD, AMIEE. Senior Lecturer.
• December 1995 BibliographiesSRC Publications: December 1995 Bibliographies. Design Sciences. C95390 Genetic-Algorithm-Based Test Generation for Current Testing of Bridging Faults in..
• Computer EngineeringComputer Engineering. Associate Professors: Hasan S. AlKhatib, Ronald L. Danielson, Ruth E. Davis, Mohammad Ali Ketabchi, Daniel W. Lewis (Chair),
• BCR Seminars - Data Communications lI: Systems and Technologiesnbsp; BCR ENTERPRISES, INC. ONLINE SEMINAR CATALOG. DATA COMMUNICATIONS II. 2 day course. "Excellently presented. Ideas skillfully reinforced with...
• 1995-1996 Student HandbookDirectory. 1995-1996 Student Handbook Part 1. 1995-1996 Student Handbook Part 2. 1995-1996 Student Handbook Part 3. 1995-1996 Student handbook Part 4... COMPANIES
• Alphatec GroupFor instant access anywhere within the Alpha-Group Web-Site. Home Page. The Group. Wafer Fabrication. Submicron Technology PCL-Thailand. More Information..
• CEPT ProductsCEPT Products. Hekimian offers a broad range of products designed for the CEPT community. The following hardware products are available: Model 3209 and..
• No TitleWhat's New | Products | Sales | Support | Feedback | Employment | Home. Telecommunications Test Equipment. Commitment to Quality. Every Wilcom employee is.
• Network Product Business TrainingTraining Information for Technical and Sales Specialists. Registration. Course Descriptions. Course Schedules. Certification. Training Registration. In..

  ORG

• A methodology for hardware verification based on logic simulationCitation page for article published by the Association for Computing. Copyright © 1997 by ACM, Inc. A methodology for hardware verification based on..<

  GOVERNMENT

• mbox by subjectmbox by subject. Messages sorted by: [ date ][ thread ][ author ] Other mail archives. Starting: Sat 07 Aug 1993 - 21:56:08 CST Ending: Wed 14 Dec 1994 -.
• mbox by datembox by date. Most recent messages. Messages sorted by: [ thread ][ subject ][ author ] Other mail archives. Starting: Sat 07 Aug 1993 - 21:56:08 CST..

  ROME LABS.

• Formal Hardware Verification EffortFormal Hardware Verification Effort. by Bob Paragi. An in-house project has been established at Rome Laboratory/ERDD to apply a prototype formal hardware.
• No TitleFrom rbotting@wiley.csusb.edu Fri May 13 13:47 PDT 1994 Return-Path: Received: from wiley.csusb.edu by silicon.csci.csusb.edu (5.0/SMI-SVR4) id AA08252;...
• mbox by authormbox by author. Messages sorted by: [ date ][ thread ][ subject ] Other mail archives. Starting: Sat 07 Aug 1993 - 21:56:08 CST Ending: Wed 14 Dec 1994 -..
• de Laurent.ARDITISignets Signets. de Laurent.ARDITI. META INDEX. Net Search. WhoWhere? Email Addresses. AltaVista: Advanced Query. MetaCrawler Searching. Ahoy!
• - 18-Mar-97 - English
  
• BAST 1995 WorkshopThe Fifth CRC-IEEE BAST Workshop. February 7-10, 1995. Bodega Bay, California. Guest Speaker. Technical Program. Gifts, Food and Entertainment-->..

  LITERATURE

• HP 8110A - List of published Literature8110A. List of published Literature. data sheet/Brochure Partnumber: 5964-6335 Application Brief "Digital Testing under Real-World Conditions" Partnumber:

  COMPANIES

• Alphatec GroupFor instant access anywhere within the Alpha-Group Web-Site. Home Page. The Group. Wafer Fabrication. Submicron Technology PCL-Thailand. More Information..
• i do not know.
• No TitleACTIVE SUBSTRATE MEMBRANE PROBE CARD. Justin Leung, Masoud Zargari, Bruce A. Wooley, S. Simon Wong. Electrical Engineering Dept., Center for Integrated..
• No TitleReliable TECHNICAL ~ _ ~r~ DT Computing ~ _ ~Jn I Testing Digital Circuits for Timing Failures by Output Waveform Analysis Piero Franco 94-9 (CSL TR #..
• Broadcast Electronics Inc.What's New" New AM-1A (PowerMizer) Rack-Mount Transmitter - Offers High Quality at Low Cost. New LYNX (Digital Stereo Generator) - Extends Digital Path....
• Personal Data for Juan Marcos Diez EstebanJuan Marcos Diez Esteban. Research Assistant. +34.1.549 57 00 -X. 420. +34.1.336 73 23. jmdiez@die.upm.es. --> ETSI Telecomunicación Ciudad Universitaria..
• Alphatec GroupDESCRIPTION: Alphatec Group is a growing affiliation of companies that comprise the world's second largest independent provider of semiconductor-related...

DIGITAL TESTING

• Data/Telecommunications/TransportTransmission - Topical Index. Other Data/Telecommunications resources: Speakers and Books. Instructor Led. General. Data Transmission Requirements -..
• TestchipAn Experimental Chip to Evaluate Test Techniques. a.k.a. The Murphy Chip. This experiment is a collaboration among several organizations. The partners...
• Services - IC Test & Product Analysis GroupServices - IC Test & Product Analysis Group. Serving the Microelectronics Industry. The NMRC's Test & Product Analysis Group provides a comprehensive..
• AskMe.com Security IndexIndex of Security Products and Services. [A] [B] [C] [D] [E] [F] [G] [H] [I] [J] [K] [L] [M] [N] [O] [P] [Q] [R] [S] [T] [U] [V] [W] [X] [Y] [Z] A. Access
• No TitleDirector: P. Kostarakis. Research, Development, Servises, Personnel, Projects, Announcements. The Hardware Technology Department serves the scientific...
• Dr.Vishwani AgrawalDr.Vishwani Agrawal. Vishwani D. Agrawal received the B.Sc. degree from the University of Allahabad, India, the B.E. degree from the University of...
• Mobicon Electronic Supplies go to Internet1996 Product Guide. TTL Logic - 74 Series. TTL Logic - 54 Series. CMOS Logic - 40/45 Series. Micro-Processor - 8/16/32 Bit CPU/MCU,Peripheral IC. Memories.
• HP 3070 Series II Family of Board Test Systems
• Thursday MorningTHURSDAY MORNING. TECHNICAL SESSIONS: 8:15 a.m. to 12:00 p.m. (last modified 4/29) Please mark in the checkboxes. those presentations that you wish to...
• NPIC&HMIT'96 Planner log192 Gordon Shugars, J. D. Simpson, J. J. Galligan and S. Hedden(ComEd) (Gamma-Metrics) Automated Digital Testing and Calibration for Analog Reactor Protection Systems. Short courses.
• HP 3070 Training for GenRad Expertsnbsp;   HP 3070 Training for GenRad Experts. Get a board into production while you are learning. Summary. GenRad in-circuit test programmers:...
• Broadcast Electronics NewsBroadcast Electronics Expands Digital Testing Lab Staff" Effective February 12, 1997, Broadcast Electronics announced the appointment of Mike Schlinkmann..
• No TitleAlexandria University, Alexandria. Faculty of Engineering. BSc in Electrical Engineering. Academic Courses attended. Preparatory Year. Descriptive...
• What's New on the Hekimian Web Site?The Hekimian Web Site was launched in February of 1996. This page lists the enhancements made to this Web site since that time. May 29, 1997 - Added PIR..
• CEPT ProductsCEPT Products. Hekimian offers a broad range of products designed for the CEPT community. The following hardware products are available: Model 3209 and...
• CmpE 3500 Digital Computation II (2S, 2D)CmpE 3500 Digital Computation II (2S, 2D) Please see official archives for recent updates. 3-3-4. Prerequisites: CmpE 2510 and EE 3280. Course Objective:.
• Manoj FranklinProf. Manoj Franklin. Manoj Franklin holds a BSc(Eng.) degree in Electronics and Communications from the University of Kerala, Trivandrum, India, and MS..
• 1995 Publications from Stanford UniversitySRC Publications: 1995 Publications from Stanford University. Design Sciences. C95323 A 1.8-V, 6.3-mW Digital-Audio Sigma-Delta Modulator in 1.2-Micron..
• J G B CONSULTING INC.JGB CONSULTING INC. Test Engineering Consulting Company. Providing. superior and cost-effective solutions. for all of your automatic testing needs. since..
• SII Company InformationCompany Information. Mailing Address. Softline International, Inc. 2140 Shattuck Avenue, Suite 2009. Berkeley, CA 94704. Phone: (510) 849-9817. Fax: (510).
• YSI Thermistor Temperature SensorsReturn to YSI Home Page. YSI Thermistor Temperature Sensors. YSI Thermistor Components and Probes, the industry best. Accuracy 1%, 0.5% or 0.25% from...
• Faculty and StaffFACULTY AND STAFF. The Electrical Engineering Department has 11 full-time faculty and two staff persons. In addition, a number of other faculty are...
• Murphy Test Chip ExperimentMurphy Test Chip Experiment. This experiment is a collaboration among several organizations. The partners include: an ASIC manufacturer (LSI Logic) an..
• No TitlePRESENTATIONS Session 1, April 18, Stefani 228. 11:00 A.M. - 11:20 A.M.Simulation Techniques to Divide the Gross Vehicle Weight into Axle Loads. 11:20...
• Gary Craig's CVGary L. Craig. Superlative Software Solutions, Inc. 5800-107 Magellan Way Raleigh, NC 27612-2283 (919) 420-2058, email: craig@cat.syr.edu. Employment. May.
• ASC '96 Program, Friday, Aug. 301996 Applied Superconductivity Conference Program Friday, August 30, 1996. Contents: 8:00 AM, EU | LU | MU 10:00 AM, EVA | EVB | EVC | EVD | EVE | LVA |..
• Tektronix MBD: Products > VXI Modular Products IndexVXI Modular Products. Tektronix has been in the VXI market since 1987 and was a leader in defining the VXIbus standard. As a founding member of both the..
• MECH 298MECH 298. This quarter (Spring 1994), MECH 298 is offered for the following sections: Section 22532 - Individual Study (1.0 units) Location: Days: TBA..
• My EducationEducation: Bachelor of Science in Electrical Engineering, Colorado State University, December 1996. Bachelor of Science in Computer Science, Colorado...
• xxxxx
• ETW'97: IEEE European Test Workshop - RemindPrev][Next][Index] ETW'97: IEEE European Test Workshop - Remind. Subject: ETW'97: IEEE European Test Workshop - Remind. From: prinetto@chiusella.polito.it.
• IIASA - IND Project DescriptionRegional Material Balance Approaches to Long-term Environmental Policy Planning. (Project Duration 1994 - 1996) Abstract. The Regional Material Balance..
• ETW98IEEE. Computer. Society. Universitat. Politècnica. Catalunya. ETW'98. IEEE European Test Workshop. Sitges, Barcelona SPAIN. May 27-29, 1998..
• ETW'97: IEEE European Test Workshop - RemindPrev][Next][Index] ETW'97: IEEE European Test Workshop - Remind. From:
• EDCC-2 Advance ProgramPrev][Next][Index] EDCC-2 Advance Program. From: simon@pimac2.iet.unipi.it. Date: Tue, 11 Ju
• DDECS '97ASCII] [ISO Latin 2 (ISO 8859-2 )] [PC Latin2 (852)] [Windows (1250)] [Kamenicky] [Macintosh] CALL FOR PAPERS. Conference on Design and Diagnostics of..
• No TitleCall for Participation. IEEE European Test Workshop. Montpellier (Hotel la Corniche in Sete), France June 12 - 14, 1996. The European Test Workshop will..
• UntitledMECHANICS OF COMPOSITE MATERIALS. 1997. Vol.33, No.1. CONTENTS. Altenbach H. and Altenbach J. Admissible numerical values of elastic constants in...
• Technical ReportsMax Planck Society Fault-Tolerant Computing Group at the University of Potsdam List of Technical Reports 1992 - 1995. 1992. MPI-I-92-601. E.S. Sogomonyan..
• cab-event-entry: EDCC-2 - revised advance programPrev][Next][Index] cab-event-entry: EDCC-2 - revised advance program. From: jgabriel@eden.dei.uc.pt (Joao G
• ETW'97: IEEE European Test Workshop - Call for papers.Prev][Next][Index] ETW'97: IEEE European Test Workshop - Call for papers. From: prinetto@chiusella.p
• ETW'97: IEEE European Test Workshop - RemindPrev][Next][Index] ETW'97: IEEE European Test Workshop - Remind. From: prinetto@chiusella.polito.it (Paolo Pr
• EDCC-2 Advance ProgramPrev][Next][Index] EDCC-2 Advance Program. From: simon@pimac2.iet.unipi.it. Date: Tue, 11 Jun 1996 15:30:09 +0100....
  IIS Library : February in 199703-13-1997 Update. 1997¦~02¤ë·s®Ñ³q§i -- «ö Author search. ¨C¤@µ§®Ñ¥Ø°O¿ýª

ANALOG TESTING

• Support Plus, Inc.Support Plus is a manufactures representative that specializes in telecommunications test equipment.
• BERT Test - System Preferences & SetupModyfing system settings in VL Laboratories T1 test and TIMS test software is easy using the System Preferences window.
• BERT Tester - Configuring User SetupsThis sample of VL Laboratories BERT Test software suite shows how easy it is to configure and save preferences for many users.
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• Panic Button Will Put Your Telecommunications Testing Back on TrackVL Laboratories extensive T1 BERT software is made even eaiser to use with the PANIC button.
• CTS Corporation Information PageElectronic Representatives, Inc. Index for CTS Corporation. Product Information. Authorized Distributors. Available Literature. Hyperlink to the CTS...

DIGITAL TESTING.

• Digital Testing EquipmentDigital Testing. Hekimian offers a number of digital testing solutions for DS1, DS3, and DDS testing. For more information, click on one of the test...
• What's New on the Hekimian Web Site?The Hekimian Web Site was launched in February of 1996. This page lists the enhancements made to this Web site since that time. May 29, 1997 - Adde
• Hekimian ProductsHekimian Laboratories, Inc., was founded in 1968 to develop and manufacture telecommunications test equipment. Now in its 29th year, the company has...
• CEPT ProductsCEPT Products. Hekimian offers a broad range of products designed for the CEPT community. The following hardware products are available: Model 3209 and..
• BAA 96-07 Proposer Information PamphletBAA 96-07 Proposer Information Pamphlet. This section provides further information on areas of interest, the submission, evaluation, and funding..

  VARIOUS HIGHER ORDER LOGICS

• Research activities: ptlptl: propositional temporal logic (PTL) tautology checker. Introduction to ptl. With ptl it is possible to use propositional temporal logic (PTL) to...
• LFCS reports 1993LFCS reports 1993. Enrichment Through Variation R. Gordon and A. J. Power LFCS report ECS-LFCS-93-254. A Modal Logic for Handling Behavioural Constraints.
• Research activities: ptlptl: propositional temporal logic (PTL) tautology checker. Introduction to ptl. With ptl it is possible to use propositional temporal logic (PTL) to...

  FORMAL HARDWARE VERIFICATION

  VERIFICATION PEOPLE

• Sales SupportSales Support. Job Title: Pre-Sales Application Engineer Location: Southern California, USA Job Title: Pre-Sales Application Engineer Location: Central..
• JobHunt: CompaniesJobHunt. A Meta-list of On-Line Job-Search Resources and Services. On-Line Job Listings. | Academia | Classified Ads | Companies | General | | Newsgroup...
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• MIRIAM E. LEESERMIRIAM E. LEESER. 335 Engr. & Theory Center Bldg. (607) 255-2816, mel@ee.cornell.edu. B.S. 1980 (Cornell), Diploma 1984, Ph.D. 1989 (Cambridge Univ.,...
• Faculty Research InterestsFaculty Research Interests. George Berg, Associate Professor, Ph.D., Northwestern Univ. Statement of Research Interests:
• Miriam E. Leeser BiographyMiriam E. Leeser. 335 Engineering and Theory Center Cornell University Ithaca, NY 14853.
• Reinhard Bündgen: Research:Hardware VerificationReinhard Bündgen, Research. Hardware Verification. Publications / Preprints. R. Bündgen & W. Küchlin: "Term Rewriting as a Tool for...
• Resume for Phillip J. WindleyNext: About this document. Phillip J. Windley. Laboratory for Applied Logic US Citizen. Department of Computer Science e--mail: windley@cs.byu.edu...
• No TitleSpecialty Areas. Communications, Information Theory, Signal Processing, and Power and Control. Pattern classification, neural networks, and signal...
• Information on Thomas KropfInformation on Thomas Kropf. Thomas Kropf Institut für Rechnerentwurf und Fehlertoleranz Universität Karlsruhe Kaiserstraße 12 76128...
• Bibliography for Jean Christophe MadreBibliography for Jean Christophe Madre. This page is part of the Hypatia Electronic Library: http://hypatia.dcs.qmw.ac.uk. Jean Christophe Madre. To help..
• Open Compiler Positions July 28, 1996HOME | PRODUCTS | SUPPORT | COMPILER CONNECTION | SITE MAP | WRITE US. Nul
• No TitleMDG Tools (V1.0) User's Manual. Zijian Zhou and Nancy Boulerice.
• Bruce R. LittlefieldBruce R. Littlefield. Manager of Computing and Network Services.
• Ralf ReetzHomepage of Ralf Reetz,University of Karlsruhe, Germany
• Fabrizio Ferrandi: Publication ListP. ublications.     --> --> International Journals. International Conferences. Contributions to International Books. Reports. Other. -->.

  LARCH PROJECT

• Larch Project at SRC Home PageWelcome to SRC's Larch Home Page. Last modified on Fri Feb 23 02:06:02 PST 1996 by schedler modified on Thu Oct 26 18:48:40 PDT 1995 by horning....
• Jim Horning's Larch PageWelcome to Jim Horning's Larch Page. Introduction. Larch is a multi-site project exploring methods, languages, and tools for the practical use of formal...
• LarchLarch Home Page. Larch is a multi-site project exploring methods, languages, and tools for the practical use of formal specifications. Much of the early..
• Jim Horning's Larch PageJim Horning's Larch Page. Introduction. Larch is a multi-site project exploring methods, languages, and tools for the practical use of formal...

  UNIVERSITIES IN SWEDEN - RESEARCH ON VERIFICATION

• Matz Kindahl - Formal MethodsFormal Methods. This page contains some documents and pages regarding formal methods on a general level. Here you can find case studies, introductions to..

  USA UNIVERSITIES - RESEARCH ON VERIFICATION

• University of Cincinnati's Formal Hardware Verification ProjectTechniques for Large Scale Hardware Verification. Sponsored by the Defense Advanced Research Projects Agency, Information Technology Office (DARPA/ITO)...
• SRI-CSL-TRLISTSRI International Computer Science Laboratory. Technical Reports (Since 1987) Fast Links: 1996 | 1995 | 1994 | 1993 | 1992 | 1991 | 1990 | 1989 | 1988 |...

  SRI - RESEARCH ON VERIFICATION.

• SRI-CSL: RECENT PAPERSSRI International Computer Science Laboratory. Theorem Proving: Not an Esoteric Diversion, but the Unifying Framework for Industrial Verification. D. A....
• SRI-CSL: RECENT PAPERSSRI International Computer Science Laboratory. Effective Theorem Proving for Hardware Verification. D. Cyrluk, S. Rajan, N. Shankar, and M.K. Srivas. This
• SRI-CSL: RECENT PAPERSSRI International Computer Science Laboratory. Ground Temporal Logic: A Logic for Hardware Verification. David Cyrluk and Paliath Narendran. Reprint from.
• SRI-CSL-FM: RECENT PAPERSSRI International Computer Science Laboratory. The IEEE magazine Computer has a 15-page "roundtable" on formal methods in its April 1996 issue (Vol. 29,..
• SRI-CSL: RECENT PAPERSSRI International Computer Science Laboratory. Mechanized Formal Verification - Seven Papers. David Cyrluk, Patrick Lincoln, Steven P. Miller, Paliath...
• David Cyrluk's Recent PapersRecent Papers. The following is a partial list of papers I have written. "Microprocessor Verification in PVS: A Methodology and Simple Example" by David..
• SRI-CSL: RECENT PAPERSSRI International Computer Science Laboratory. A Tutorial on Using PVS for Hardware Verification. S. Owre, J. M. Rushby, N. Shankar and M. K. Srivas.
• Henny Sipma's research linksHenny Sipma. Research links. Seminars. Security seminar. SRI-CSL seminar. Formal Methods. Resources. Theoretical Computer Science - Virtual Address Book...
• SRI-CSL Technical Reports AbstractsSRI International Computer Science Laboratory. Technical Report Abstracts. An Overview of Enclaves 1.0. Li Gong. SRI-CSL-96-01. Abstract. With the advent..
• SRI-CSL-FM: RECENT PAPERSSRI International Computer Science Laboratory. Recent Papers in Formal Methods and Dependable Systems. Fast Links: 1997 | 1996 | 1995 | 1994 | 1993 | 1992.
• Formal Methods, SRI International, Former NewsSRI International Computer Science Laboratory. Formerly New Announcements. Updated August 28, 1996. A tutorial featuring PVS will be presented on October..
• No Titledocumentstyle[11pt,cite,url]{article} \sloppy \topmargin -0.25in \textwidth 5.75in \textheight 8.25in \oddsidemargin .53in \evensidemargin .28in...

  STANFORD UNIVERSITY - RESEARCH ON VERIFICATION.

• Hardware Verification GroupGroup Leader: David L. Dill. Research Associates: SeungJoon Park. Jens U. Skakkebæk. Ph.D. Students: Clark W. Barrett. Supratik Chakraborty. Satyaki..
• No TitleName: OBJ3 Keywords: order-sorted equational logic, parameterized modules, rewriting Description: Semantics: the underlying logic, order-sorted equational.
• No TitleReturn-Path: Date: Thu, 25 Jun 92 08:47:35 CDT From: Robert S. Boyer. To: nqthm-users@cli.com Subject: State of things Reply-To: boyer@cli.com Below is a..
• EMail Msg <wfs6kjOKmlE2M=5GFi@arp>Re: Cold water. Zdzislaw Meglicki <Zdzislaw.Meglicki@arp.anu.edu.au> Mail folder: QED. Next message: Konrad Slind: "getting a formal..
• EMail Msg <93Apr30.033243met_dst.8088@sunbroy14.informatik.tu-muenchen.de&gCold water. Konrad Slind <slind@informatik.tu-muenchen.de> Mail folder: QED. Next message: Zdzislaw Meglicki: "Re: Cold Water"Previous...
• No TitleASIC & Systems State Key Laboratory. Director: Prof. Zhang Qianling.

  UNIVERSITIES IN FRANCE - RESEARCH ON VERIFICATION.

• Liste des Publi VDSVDS PUBLICATIONS. Page réactualisée le 9 octobre 1996. BORRIONE D., BOUAMAMA H., DÉHARBE D., LE FAOU C., WAHBA A. HDL-Based...

  UNIVERSITIES IN DENMARK - RESEARCH ON VERIFICATION.

• Hardware Verification using Monadic Second-Order LogicHardware Verification using Monadic Second-Order Logic. David A. Basin and Nils Klarlund. We show how the second-order monadic theory of strings can be..
• No Titlestring{brics = "{BRICS}"} @string{daimi = "Department of Computer Science, University of Aarhus"} @string{iesd = "Department of Mathematics and Computer...

  UNIVERSITIES IN UNITED KINGDOM - RESEARCH ON VERIFICATION.

• Typed CIRCAL: A High Level Framework for Hardware VerificationDocument Archive. Typed CIRCAL: A High Level Framework for Hardware Verification George J. Milne, and Mauro Pezze. Tech Report No. RR-88-04
• Hardware VerificationNext: Program Synthesis Up: Applications to System Previous: Applications to System. Hardware Verification. Francisco Cantu has applied proof planning to..
• Hardware VerificationNext: Decision Procedures Up: Applications of Proof Previous: Bridge. Hardware Verification. Francisco Cantu-Ortiz has just started an investigation of..
• Applications to System DevelopmentNext: Hardware Verification Up: Achievements of the Previous: Reasoning in Framework. Applications to System Development. Hardware Verification. Program...

  UNIVERSITIES IN KOREA - RESEARCH ON VERIFICATION.

• target="other"

  GERMAN UNIVERSITIES - RESEARCH ON VERIFICATION

• Restricted Branching Programs and Hardware Verification, by S. PonzioPhD Theses Series of ECCC. Stephen J. Ponzio: Restricted Branching Programs and Hardware Verification. [PostScript (520KB)] Abstract. This thesis concerns.
• Reinhard Bündgen: Research:Hardware VerificationReinhard Bündgen, Research. Hardware Verification. Publications / Preprints. R. Bündgen & W. Küchlin: "Term Rewriting as a Tool for...
• Harald RueßUniversität Ulm, Abteilung Künstliche Intelligenz. Current Teaching: Hardware Verification. Lab Exercises: Hardware Verification. Course...
• ProjectsProjects Overview. OFFIS - R&D Division Embedded Systems. EU. FORMAT Formal Methods in Hardware verification. EuroFORM Formal Methods for Correct.
• 3TAP: Publications by Subject3TAP: Publications by Subject. The following is a list of papers, report, and other publications written in connection with. sorted by subject. Subjects:..
• No TitleGoal XXXXXXXXXXXXXXXXX * Support "doing" mathematics by computer using one interface * All phases of doing mathematics, see "creativity spiral", should be.
• Papers on our work using PVSUniversität Ulm, Fakultät für Informatik, Abt. KI - PVS @ Ulm. Papers on our work using PVS. Fast Links: Semantics of Programming Languages

  VERIFICATION BIBLIOGRAPHIES

• Bibliography on Hardware Verification and Formal MethodsBibliography on Hardware Verification and Formal Methods. This bibliography forms a part of the Computer Science Bibliography Collection.
• Bibliography on Hardware Verification and Formal MethodsBibliography on Hardware Verification and Formal Methods. This bibliography forms a part of the Computer Science Bibliography Collection.
• No TitleArticle: 2275 of comp.lang.vhdl Path: pitt.edu!birdie-blue.cis.pitt.edu!gatech!howland.reston.ans.net!pipex!uknet!nessie!nessie.mcc.ac.uk!sr From:...
• Abstracts of Selected PublicationsAbstracts of Selected Publications. A Modular Presentation of Modal Logics in a Logical Framework. David Basin, Sean Matthews and Luca Vigano. FILES:...
• No TitleTPTP Citations. The following is a summary of the papers which cite the TPTP Problem Library. The purpose of this index is to raise awareness about system.
• Laboratory for Applied Logic Reading ListLAL READING LIST. The following papers are suggested readings for new member of the Laboratory for Applied Logic. The readings will acquaint you with some.
• Laboratory for Applied LogicFORMAL METHODS AROUND THE WORLD. A number of other research laboratories in formal methods have made information available on the web. This page collects..
• Bibliographies on Software/Hardware Engineering and Formal MethodsThe Collection of Computer Science Bibliographies. Up: The Collection of Computer Science Bibliographies. Home. Bibliographies on Software/Hardware..
• ATG Reading ListAbstract Type Group Reading List. The List. HML: A Hardware Description Language Based on SML John O'Leary, Mark Linderman, Miriam Leeser, Mark Aagard...

  BENCHMARK CIRCUITS FOR VERIFICATION

• IFIP WG10.5 Hardware Verification Benchmark SuiteIFIP WG10.5 Benchmark Circuits. This is the official home page of the IFIP WG10.5 Benchmark-Circuits Suite for Hardware Verification. The set of benchmark.
• 2 The Benchmark CircuitsNext] [Previous] [Top] 2 The Benchmark Circuits. 2.1 - Releases. 2.2 - Verification Problem Presentation. 2.2.1 - VHDL. 2.2.2 - Storage Elements and...
• DocumentationNext] Benchmark-Circuits for Hardware -Verification v1.1.0. This is not the actual version 1.2.0 which can be only found directly at our ftp server!..

  PHD THESIS ON VERIFICATION.

• No TitleRestricted Branching Programs and Hardware Verification PhD Thesis, Stephen Ponzio, MIT, August 1995. Table of Contents.

  CONFERENCES RELATED TO FORMAL VERIFICATION.

• No TitleThe International Conference on Formal Methods in Computer-Aided Design. (FMCAD -- Successor to TPCD) CALL FOR PAPERS. Palo Alto, CA, USA. 6 - 8. November.
• Ninth Annual Conference on Computer AssuranceThis information provides you with details concerning The Ninth Annual Conference on Computer Assurance.
• pre-conference Workshop on Applied Formal MethodsWORKSHOP ON APPLIED FORMAL METHODS. Dates : December 14-17, 1996 Venue : Raman Auditorium Sponsored by: Indian Association Of Research in Computing..
• No TitleFMCAD 96 Program. Wednesday, November 6, 1996. 8:00-8:50. Check-In and Late Registration. 9:00-10:00. Invited Talk. Chair: M. Srivas. Kurt Keutzer,...
• No TitleProgramme The 1996 International Conference on Theorem Proving in Higher Order Logics Monday 26 August
• The TPCD ProceedingsTheorem Provers in Circuit Design. Proceedings of the IFIP WG10.2 International Conference on Theorem Provers in Circuit Design: Theory, Practice, and...
• No TitleCALL FOR PAPERS | | | | The International Conference on | | | | Formal Methods in Computer-Aided Design: | | (FMCAD -- Successor to TPCD) |

  COMPUTATIONAL LOGIC INC. (CLI) COMPANY

• No TitleTechnical Reports September 6, 1994. Computational Logic, Inc. 1717 West Sixth St., Suite 290 Austin, Texas 78703-4776. 101. Design Goals of ACL2, by Matt.
• No TitleHardware Verification Using Mechanical Theorem Provers. 3 Days. Prerequisites: Introduction to the Boyer-Moore Theorem Prover and Introduction to Hardware.

  OTHER INDUSTRIAL RESEARCH ON VERIFICATION

• B-Tree Systems, Inc.B-Tree's Career Opportunity Center. Welcome to B-Tree's Career Opportunity Center. If you have read about our unique product and its enviable position in.

  MILITARY RESERACH ON VERIRFICATION

• COMPLEX SYSTEMSCOMPLEX SYSTEMS Mr. Robert Parker. Good morning. I'm going to talk to you for a few minutes about this area of "Complex Systems" and a task in...

  VERIFICATION OF MICROPROCESSORS

• No TitleMODEL: mpc860_hv VERSION: v1.3 TITLE: Quad Integrated Communications Controller DATE: 20-Mar-97 FUNCTION: processors SUBFUNCTION: microprocessor BASE PART.
• Structure and Correctness of MicroprocessorsStructure and Correctness of Microprocessors. A C J Fox, Dr N A Harman and Professor J V Tucker. Work on the structure and correctness of microprocessors.
• Formal Hardware VerificationCoverage-Based Microprocessor Verification. Formal Hardware Verification. Practical Aspects of Formal hardware Verification Verifying the correct behavior.

  VERIFICATION RESEARCH OF INTEL

• Intel and the CommunityVisiting Faculty. Professor Andrew M. Fraser. Professor Shang-Hua Teng. Professor Alok Choudhary. Professor Carl Seger. Professor David L. Dill.

  BINARY DECISION DIAGRAMS IN VERIFICATION.

• BDDTCL: An Environment for Visualizing and Manipulating Binary Decision DiagBDDTCL: An Environment for Visualizing and Manipulating Binary Decision Diagrams. Kurt E. Partridge University of Washington Box 352350 Seattle

  VERIFICATION FOR TELECOMMUNICATION.

• Telecommunications BackgrounderSpecialized Verification Tools for Telecommunications Applications. Telecommunications Workbenches Product Backgrounder. Contents: Introduction..

  RUBY LANGUAGE

• Mary Sheeran's useful linksHardware design. The Ruby relational design language. Designing Correct Circuits '96. A list of conferences and workshops in formal methods for hardware...

  ML LANGUAGE

• ReferencesNext: About this document Up: The Metalanguage ML Previous: Experimental support for. References. 1. P.B. Andrews, An Introduction to Mathematical Logic...

  HOL LANGUAGE

• ReferencesNext: About this document Up: The HOL System Previous: Timing and counting. References. 1. P.B. Andrews, An Introduction to Mathematical Logic and Type..
• Demonstration Code for Hardware Verification in HOLDemonstration Code for Hardware Verification in HOL. The following files introduce proof techniques for HOL. ML expressions. Sieve of erosthanes in ML...
• The HOL SystemThe HOL System. The HOL System is an environment for interactive theorem proving in a higher-order logic. Its most outstanding feature is its high degree..
• ReferencesNext: About this document Up: Theorem Proving in HOL Previous: Theorem continuations without. References. 1. P.B. Andrews, An Introduction to Mathematical.
• Programme: Theorem Proving in Higher Order LogicsProgramme: TPHOLs'96. The 1996 International Conference on Theorem Proving in Higher Order Logics. Monday 26 August. 12.00 Registration. 12.30 Lunch..
• Information about new_theory `HOL88`new_theory `HOL88` An Introduction to Hardware Verification in Higher Order Logic. by. Graham Birtwistle, Shiu-Kai Chin, Brian Graham. Table of contents..
• Information about new_theory `HOL88`new_theory `HOL88` An Introduction to Hardware Verification in Higher Order Logic. by. Graham Birtwistle, Shiu-Kai Chin, Brian Graham. Table of contents..
• Description of the HOL Theorem Proving SystemDescription of the HOL Theorem Proving System. Keywords: Higher Order, Classical, Natural deduction with tactics. Description: Semantics: Classical higher.
• The HOL Theorem Proving SystemWelcome to the HOL Documentation Page. The Laboratory for Applied Logic at Brigham Young University is pleased to provide documentation and information...
• Current State of KnowledgeNext: Organizing Abstract Modules Up: Project Description Previous: Impact. Current State of Knowledge.   The HOL theorem proving system [GM93] has...
• TPHOLs'96 bibliographic informationLecture Notes in Computer Science 1125. Joakim von Wright, Jim Grundy, and John Harrison (Eds.) Theorem Proving in Higher Order Logics: 9th International.
• TPHOLs '96TPHOLs '96. CALL FOR PARTICIPATION 1996 INTERNATIONAL CONFERENCE ON THEOREM PROVING IN HIGHER ORDER LOGICS...
• No TitleCP95 final call for papers (text+tex)
• Ninth Annual Conference on Computer AssuranceThis information provides you with details concerning The Ninth Annual Conference on Computer Assurance.
  Papers on FIDO and MONAPapers on FIDO and MONA. Concepts Applications Algorithms Other. Concepts. Mona: Monadic Second-Order Logic in Practice. TACAS '95. Our first paper on the

  SEMINARS AND COURSES ON VERIFICATION.

• No TitleEECS 298-11: CAD Seminar Wednesday, February 7, 1995, 5pm 531 Cory Hall, Hogan Room Hardware Verification at AT&T Robert P. Kurshan AT&T Bell Laboratories.
• HOL Training CourseIntroduction to the HOL Theorem Prover and its Applications. A Training Course on HOL. The HOL system is a powerful and widely used computer-aided tool...
• ReferencesNext: About this document Up: No Title Previous: words.ml. References. 1. P. Andrews. An Introduction to Higher Order Logic: to Truth through Proof...
• Data Abstraction in Hardware VerificationData Abstraction in Hardware Verification. So far, the types of the arguments for both the implemenation and behavioral specifications have been the same..
• No Titlebegin{thebibliography}{Win92b} \bibitem[DLP79]{socialproof} Richard DeMillo, Richard Lipton, and Alan Perlis. \newblock Social processes and proofs of..
• AR Talks IndexReturn to ARG Home Page. AR Talks Index. Abstracts from most of the previous talks are available. Formal Verification of the Fairisle ATM Switch Fabric...
• No TitleSubject: CPS 1.0 PARALLEL DISCRETE-EVENT SIMULATOR NOW AVAILABLE.
• Author-IndexAuthor-Index. previous page - index root. Hirschman, Lynette. Hirschmann, Petra. Hirschowitz, André Hirsh, Sandra G. Hirshfeld, J. Hirshfeld, Yoram.
• Technical ReportsMax Planck Society Fault-Tolerant Computing Group at the University of Potsdam List of Technical Reports 1992 - 1995. 1992. MPI-I-92-601. E.S. Sogomonyan.

  WORKSHOPS AND CONFERENCES RELATED TO VERIFICATION.

• ETW'97: IEEE European Test Workshop - Call for papers.Prev][Next][Index] ETW'97: IEEE European Test Workshop - Call for papers. From: prinetto@chiusella.polito.it (Paolo Prinetto) No TitlePlease find enclosed the call for papers for ETW'97: IEEE European Test Workshop. This call and other information on ETW'97 are also accessible by WWW at..
• EDCC-2EDCC-2. Conference Details: Second European Dependable Computing Conference Taormina, Italy. Contact Person: Luca Simoncini Tel.: Fax: E-Mail: Homepage:
• IEEE European Test WorkshopIEEE European Test Workshop. Call for Participation. IEEE European Test Workshop Montpellier (Hotel la Corniche in Sete), France June 12 - 14, 1996. The..
• EDCC-2 Advance ProgramPlease post and distribute in your country as largely as possible. Hope to see you in Taorm