RESEARCH AREAS OF MAREK A. PERKOWSKI.



Related to EE 572/672 Class. Related to EE 573/673 Class. Related to EE 574/674 Class. Related to VHDL Class. Related to Test and Design for Test. Related to Intelligent Robotics I Class. Related to Intelligent Robotics II Class.

RESEARCH AREAS RELATED TO ADVANCED LOGIC CLASS EE 572/EE 672

SUM-OF-PRODUCT MINIMIZATION.

  1. M. Perkowski, "The method of solving combinatorial problems in the automatic design of digital systems". Institute of Automatic Control, Technical University of Warsaw, Ph.D. Thesis, 1980, 434 pages in Polish. Name of Advisor: Professor Wieslaw Traczyk, Director of the Institute of Automatic Control. 
    This thesis includes the graph-coloring 
approach based on minimal implicants
that was next improved in subsequent
papers from this section.
  2. M. Perkowski, N. B. Goldstein, "A New Algorithm for Multioutput Function Minimization Based on Reduction to Graph-Coloring Problem," University of Minnesota, Department of Electrical Engineering, 48 pages, 1983.
  3. M. Perkowski, L. Nguyen, N. B. Goldstein, "PLA With Tail Gives Estimate to Minimum Solution and has a Decreased Area," EE Report, PSU, 64 pages, 1985. 
    Graph coloring approach to SOP,
generalized to 4-level PLAs.
  4. L. Nguyen, M. Perkowski, "Boolean Minimization for PALs Using Graph Coloring on Personal Computer," Record of Northcon '86, paper 11/4, pp. 11/4.1 - 11/4.6, Seattle, Sept. 30 - Oct. 2, 1986.
  5. L. Nguyen, M. Perkowski, N. Goldstein, "PALMINI - Fast Boolean Minimizer for Personal Computers," Proc. of the IEEE/ACM 24th Design Automation Conference, pp. 615 - 621, Miami, Florida, June 28 - July 1, 1987.
  6. M. Perkowski, P. Wu, "A New Approach to Exact Minimization of Boolean Functions with Multiple-valued Inputs," PSU EE Dept., DIADES Research Report No. 38, Version 1.00, 114 pages, December 12 1988.
  7. M. A. Perkowski, P. Wu, K. A. Pirkl, "KUAI-EXACT: A New Approach for Multi-Valued Logic Minimization in VLSI Synthesis," Proc. of the IEEE 1989 ISCAS - International Symposium on Circuits and Systems, pp. 401 - 404, Portland, OR, May 9-11, 1989.
  8. M. J. Ciesielski, S. Yang, M. A. Perkowski, "Multiple-Valued Minimization Based on Graph Coloring," Proc. of the IEEE International Conference on Computer Design: VLSI in Computers, ICCD'89, pp. 262 - 265, October 1989.

MULTILEVEL LOGIC MINIMIZATION

  1. M. Perkowski, J. Fox, "Optimization of Multilevel Logic Networks Designed with Cells from a Standard Cell Library," GTE Laboratories Incorporated, 64 pages, September 1985. 
    Rule based approach which implemented
an AI-based method for backtracking.
  2. M. Perkowski, L. J. Ming, A. Wieclawski, "EXPO: An Expert System for Optimization of Multi-Level Logic Circuits," Proc. of the IASTED Conference, Applied Simulation and Modeling, ASM '87, pp. 180 - 183, Santa Barbara, CA, May 26 - 29, 1987. 
    Very shortened and simplified version of the GTE report.

FUNCTIONAL DECOMPOSITION AND MACHINE LEARNING.

  1. M. Perkowski, J.E. Brown, "An Unified Approach to Designs Implemented with Multiplexers and to the Decomposition of Boolean Functions," Proc. of the 1988 ASEE National Conference, Portland, Oregon, June 19-23, 1988, pp. 1610-1619. 
    This paper introduced the PUB decomposition
for the first time.
  2. M. A. Perkowski, P. Dysko, B. J. Falkowski, "Two Learning Methods for a Tree-Search Combinatorial Optimizer," Proc. of IEEE International Phoenix Conference on Computers and Communication, pp. 606 - 613, Scottsdale, Arizona, March 1990. 
    This paper introduced the idea of
learning search by modifying
coefficients of weighted cost functions
that evaluate nodes and search operators.
  3. M. Perkowski, "New Approach to Boolean Decomposition with Application to Xilinx's FPGAs," Xilinx Corporation, 2100 Logic Drive, San Jose, California, February 14, 1992.
  4. W. Wan, M. A. Perkowski, "A New Approach to the Decomposition of Incompletely Specified Functions based on Graph-Coloring and Local Transformations and Its Application to FPGA Mapping," Proc. of the IEEE EURO-DAC '92, European Design Automation Conference, pp. 230 - 235, Sept. 7-10, Hamburg, 1992. 
    This was first application of Ashenhurst/Curtis
Decomposition to FPGA optimization/mapping.
  5. M. Perkowski, "A Survey of Research Areas in Functional Decomposition," Avionics Directoriate, Wrights Laboratories, Wright-Patterson Air Force Base, Dayton, Ohio, 31 August 1994.
  6. M. A. Perkowski, T. Ross, D. Gadd, J.A. Goldman, and N. Song, "Application of ESOP Minimization in Machine Learning and Knowledge Discovery," Proc. of the Second Workshop on Applications of Reed-Muller Expansion in Circuit Design, Chiba City, Japan, 27-29 August 1995, pp. 102-109. This paper introduced using ESOP minimization as a new approach to ML.
  7. M. A. Perkowski, "A New Representation of Strongly Unspecified Switching Functions and Its Application to Multi-Level AND/OR/EXOR Synthesis," Proc. of the Second Workshop on Applications of Reed-Muller Expansion in Circuit Design, Chiba City, Japan, 27-29 August 1995, pp. 143-151. MVCDBs were introduced here for the first time as a new representation of strongly incomplete functions. Also, a new model of decomposition was proposed.
  8. P. Sapiecha, M. A. Perkowski, and T. Luba, "Decomposition of Information Systems Based on Graph Coloring Heuristics," Proceedings of Symposium on Modelling, Analysis and Simulation, CESA'96 IMACS Multiconference, Lille, France, July 9-12, 1996.
  9. C. Files, R. Drechsler, M. Perkowski, "Functional Decomposition of MVL Functions," Proc. ISMVL'97, Halifax, Nova Scotia, May 1997.
  10. M. Perkowski, M. Marek-Sadowska, L. Jozwiak, T. Luba, S. Grygiel, M. Nowicka, R. Malvi, Z. Wang, and J. S. Zhang, "Decomposition of Multiple-Valued Relations," Proc. ISMVL'97, Halifax, Nova Scotia, May 1997. First paper to introduce decomposition of Multiple-Valued relations.
  11. M. Perkowski, Report about Encoding in Decomposition. Several unpublished encoding algorithms for decomposition are presented.
  12. M. Perkowski, Report about Strategies in Decomposition. Several unpublished search strategies for decomposition are presented.
  13. M. Perkowski, Survery about Functional Decomposition. All work before 1994 is surveyed. A list of about 500 papers included. Russian and European work.
  14. M. Perkowski, Unified Approach to Decomposition of Boolean and MV Functions and Relations. Our approach in all details. Many new results.
  15. M. Perkowski, "Decomposition of Functions and Relations."

LOGIC SYNTHESIS FOR LAYOUT GENERATORS.

  1. A. Wieclawski, M. Perkowski, "Optimization of Negative Gate Networks Realized in Weinberger-like Layout in a Boolean Level Silicon Compiler," Proc. of the 21st Design Automation Conference, ACM and IEEE, pp. 703 - 704, Albuquerque, 25 - 27 June, 1984.
  2. M. Perkowski, "Minimization of Two-Level Networks with Negative Gates," Proc. of the 29th Midwest Symposium on Circuits and Systems, pp. 756 - 762, Lincoln, Nebraska, August 10-12, 1986.
  3. A. Wieclawski, M. Perkowski, "Cost Function for Layout in Boolean Level Silicon Compiler," Proc. of the Midwest 86 Symposium on Circuits and Systems, pp. 566 - 570, Lincoln, Nebraska, August 10-12, 1986.
  4. M. Perkowski, "A Parallel Programming Approach to the Design of Two-Level Networks with Negative Gates," Proc. of the IEEE International Workshop on Logic Synthesis, Research Triangle Park, North Carolina, May 12 - 15, 1987.
  5. C. Files, A. Reis, M. A. Perkowski, M. Robert, and D. Auvergne, "Minimization of Networks with Complex Gates," Proceedings of Workshop "Boolesche Probleme", Freiberg, Germany, 19-20 September, 1996.

LINEARLY INDEPENDENT LOGIC.

  1. M. A. Perkowski, A. Sarabi, F. R. Beyl, "Universal XOR Canonical Forms of Switching Functions," Proc. of IFIP W.G. 10.5 Workshop on Applications of the Reed-Muller Expansion in Circuit Design," Hamburg, Germany, September 16-17, pp. 27 - 32, 1993.
  2. M. A. Perkowski, "A Fundamental Theorem for EXOR Circuits," Proc. of IFIP W.G. 10.5 Workshop on Applications of the Reed-Muller Expansion in Circuit Design," Hamburg, Germany, September 16-17, pp. 52 - 60, 1993.
    EXOR_POSTSCRIPTS/fundamental.ps = This is the paper in postscript with no figures.
    .
  3. M. Perkowski, A. Sarabi, R. Beyl, "New Results in Orthogonal Logic," Record of IWLS'95 Conference, April 1995.
  4. M. A. Perkowski, New paper about Generalized Kronecker RM Forms, Submitted to RM'97.
  5. M. A. Perkowski, New paper about Hierarchy based on Generalized Kronecker RM Forms, Submitted to RM'97.
  6. M. A. Perkowski, New paper about Linearly Independent Expansions, Forms and Trees, Submitted to RM'97.

HEURISTIC TREE SEARCH FOR LOGIC SYNTHESIS, GENERAL PROBLEM SOLVING, AUTOMATIC THEOREM PROVING, ARTIFICIAL INTELLIGENCE AND MACHINE LEARNING APPROACHES

  1. M. Perkowski, "Relational-Structure Languages and their Application in the System for Automatic Design of Block Synthesis of Digital Systems of Automatic Control," Proc. of the 6th National Conference on Automatic Control. Vol. 1, pp. 695 - 707 (in Polish), Poznan, Poland, 9-11 September 1974.
  2. M. Perkowski, "Heuristic Optimization in the System for Automatic Design of Block-Oriented Digital Systems of Automatic Control," Proc. of the First National Symposium on Heuristic Methods, pp. 101 - 135, (in Polish), Polish Cybernetical Society, PTC, Warsaw, 28 Sept. 1974.
  3. M. Perkowski, "Application of Heuristic Methods to the Design of Complex Automata," Institute of Automatic Control, Technical University of Warsaw, 120 pages, (in Polish), 1974.
  4. M. Perkowski, "An Automated Approach to the Design of Block-Oriented Digital Systems," Institute of Automatic Control, Technical University of Warsaw. Sponsored by National Science Foundation of USA, No. GF-3798 through the Department of Computer and Control Sciences, University of Minnesota, Technical report 8/1975, 83 pages, Warsaw, October 1975.
  5. M. Perkowski, "Relational-Structure Languages and Their Application in the System for Automatic Design of Digital Systems," Institute of Automatic Control, Technical University of Warsaw. Sponsored by National Science Foundation of USA, No. GF-3798 through the Department of Computer and Control Sciences, University of Minnesota, Technical report 9/1975, 27 pages, Warsaw, October 1975.
  6. M. Perkowski, W. Baczynski, K. Jankowski, "Experiments with the Heuristic Program to Optimize Programs," Proc. of the IInd National Symposium on Heuristic Methods, Polish Cybernetical Society, PTC, Warsaw, Poland, (in Polish), 27 Sept. 1975.
  7. M. Perkowski, "An Approach to the Automatic Synthesis of Heuristic Problem-Solving Programs," Proc. of the IInd National Symposium on Heuristic Methods, pp. 28 - 43, (in Polish), Polish Cybernetical Society, PTC, Warsaw, Poland, 27 Sept. 1975.
  8. M. Perkowski, "A Multipurpose and Multistrategic Program for Solving Combinatorial Problems," Proc. of the 3rd Symposium on Heuristic Methods, Vol. 3. pp. 23 - 90 (in Polish), Polish Cybernetical Society, Warsaw, 25 September 1976.
  9. M. Perkowski, "An Application of General Problem-Solving Methods in Computer-Aided Design: the MULTICOMP System and its Problem-Oriented Source Language". Proc. of the IVth International Symposium on Heuristic Methods, PTC, Vol. 3., pp. 55 - 102, Warsaw, 24 September, 1977.
  10. M. Perkowski, "The State-Space Approach to the Design of Multipurpose Problem-Solver for Logic Design," "Artificial Intelligence and Pattern Recognition in Computer-Aided Design," In J. C. Latombe, (ed.), North Holland, Amsterdam, pp. 123-140, 1978. The above paper introduced the general state-space model of solving all popular problems of logic design.
  11. M. Perkowski, "Digital Design by Problem-Solving Transformations," Proc. of the International Conference on "Artificial Intelligence and Information-Control Systems of Robots," pp. 18/1-18/19, Smolenice near Bratislava, Czechoslovakia, 30 June - 4 July, 1980. The above paper introduced the transformational model of optimizing the data path and the control unit concurrently, and was based on Glushkov model.
  12. M. Perkowski, "The method of solving combinatorial problems in the automatic design of digital systems". Institute of Automatic Control, Technical University of Warsaw, Ph.D. Thesis, 1980, 434 pages in Polish. Name of Advisor: Professor Wieslaw Traczyk, Director of the Institute of Automatic Control. This was my Ph.D thesis that included many ideas refined and published until 1990.
  13. M. Perkowski, "Multistrategical Problem Solver," Proc. of the 2nd International Meeting on Intelligent Robotics and Knowledge Representation, Plenum Press, Repino near Leningrad, USSR, 12-19 October 1980.
  14. M. Perkowski, "Design Automation of Digital Systems as a New Domain for AI Research," Proc. of the VIth Symposium on Heuristic Methods, Polish Cybernetical Society, PTC, 1981.
  15. M. Perkowski, "Optimization Using Tree Search Techniques," Seminar on Numerical Techniques of Optimization and Control, Control Sciences and Dynamical Systems Center, University of Minnesota, April 8, 1982.
  16. M. Perkowski, "Digital Devices Design by Problem-Solving Transformations," Journal on Computers and Artificial Intelligence, Vol. 1, No. 4, pp. 343 - 365, August 1982.
  17. M. Perkowski, J. Liu, "A Software Tool for Fast Prototyping of Logic Synthesis Programs," Proc. of the 30th Midwest Symposium on Circuits and Systems, paper TA 2.6.3, Syracuse, New York, August 16-18, 1987.
  18. M. Perkowski, J. Liu, J. Brown, "Quick Software Prototyping: CAD Design of Digital CAD Algorithms," In G. Zobrist, (ed.), "Progress in Computer Aided VLSI Design," Vol. 1., Ablex Publishing Corp., pp. 353-401, 1989.

WALSH AND NEW TRANSFORMS. SPECTRAL METHODS IN LOGIC DESIGN

  1. B. J. Falkowski, M. A. Perkowski, "Algorithm and Architecture for Gray Code Ordered Fast Walsh Transform," Proc. of the IEEE ISCAS'90, International Symposium on Circuits and Systems, pp. 1596 - 1599, New Orleans, 1-3 May 1990.
  2. B. J. Falkowski, M. A. Perkowski, "Essential Relations between Classical and Spectral Approaches to Analysis, Synthesis and Testing of Completely and Incompletely Specified Boolean Functions," Proc. of the IEEE ISCAS'90, International Symposium on Circuits and Systems, pp. 1656 - 1659, New Orleans, 1-3 May 1990.
  3. B. Falkowski, I. Schaefer, M. Perkowski, "A Fast Computer Algorithm for the Generation of Disjoint Cubes for Completely and Incompletely Specified Boolean Functions," Proc. of the 33rd Midwest Symp. on Circuits and Systems, pp. 1119 - 1122, Alberta, Canada, August 1990.
  4. B. J. Falkowski, M. A. Perkowski, "A Family of All Essential Radix-2 Addition/Subtraction Multi-Polarity Transforms: Algorithms and Interpretations in Boolean Domain," Proc. of the IEEE ISCAS'90, International Symposium on Circuits and Systems, pp. 2913 - 2916, New Orleans, 1-3 May 1990. The above paper introduced the Arithmetic and Adding transforms.
  5. B. J. Falkowski, M. A. Perkowski, "Algorithms for the Calculation of Hadamard-Walsh Spectrum for Completely and Incompletely Specified Boolean Functions," Proc. of IEEE International Phoenix Conference on Computers and Communication, pp. 868 - 869, Scottsdale, Arizona, March 1990.
  6. B. J. Falkowski, M. A. Perkowski, "Walsh Type Transforms for Completely and Incompletely Specified Multiple-Valued Input Binary Functions," Proc. of the 20th IEEE ISMVL, International Symposium on Multiple-Valued Logic, pp. 75 - 82, Charlotte, NC, May 1990.
  7. B. J. Falkowski, M. A. Perkowski, "One More Way to Calculate the Hadamard-Walsh Spectrum for Completely and Incompletely Specified Boolean Functions," International Journal of Electronics, Vol. 69, No. 5, pp. 595 - 602, November 1990.
  8. B. J. Falkowski, M. A. Perkowski, "Algorithm for the Generation of Disjoint Cubes for Completely and Incompletely Specified Boolean Functions," International Journal of Electronics. Vol. 70, No. 3, pp. 533 - 538, March 1991.
  9. I. Schaefer, B. J. Falkowski, M. A. Perkowski, "A Fast Computer Implementation of Adding and Arithmetic Multi-Polarity Transforms for Logic Design," Proc. of the 34th IEEE Midwest Symposium on Circuits and Systems, Monterey, CA, May 1991.
  10. I. Schaefer, B.J. Falkowski, M. A. Perkowski, "An Efficient Computer Algorithm for the Calculation of Walsh Transform for Completely and Incompletely Specified Multiple-Valued Input Binary Functions," Proc. of the 34th IEEE Midwest Symposium on Circuits and Systems, Monterey, CA, May 1991.
  11. I. Schaefer, B. J. Falkowski, M. A. Perkowski, "Generation of Adding and Arithmetic Multi-Polarity Transforms for Incompletely Specified Boolean Functions," International Journal of Electronics, Vol. 73, No. 2., pp. 321 - 331, 1992.
  12. B. Falkowski, I. Schaefer, M. Perkowski, "Calculation of the Rademacher-Walsh Spectrum from a Reduced Representation of Boolean Functions," Proc. of the IEEE EURO-DAC '92, European Design Automation Conference, pp. 181 - 186, Sept. 7-10, Hamburg, 1992.
  13. B. Falkowski, I. Schaefer, M. Perkowski, "Effective Computer Methods for the Calculation of Rademacher-Walsh Spectrum for Completely and Incompletely Specified Boolean Functions," IEEE Trans. on Computer-Aided Design, pp. 1207 - 1226, October 1992. The above paper is a summary of all works with B. Falkowski on Walsh transforms. This was the fastest method, until BDD-based method was presented by Clarke et al.
  14. B. Falkowski, I. Schaefer, M. A. Perkowski, "An Efficient Computer Algorithm for the Calculation of the Walsh Transform for Incompletely Specified Multiple-Valued Binary Functions," International Journal of Electronics, Vol. 75, No. 2., pp. 163 - 175, 1993.
  15. I. Schaefer, M. Perkowski, "Applications of New Orthogonal Transforms in Digital Design," In R. Stankovic, M. Stojic, and M.S. Stankovic (ed.), "Recent Developments in Abstract Harmonic Analysis with Applications in Signal Processing," Nauka, Belgrade, 1996, pp. 217-259. The above paper introduced several new transforms, as well as the method to create arbitrary transforms for logic design.

CELLULAR LOGIC AND LAYOUT-DRIVEN LOGIC SYNTHESIS

  1. L-F. Wu, M. A. Perkowski, "Minimization of Permuted Reed-Muller Trees for Cellular Logic Programmable Gate Arrays," Proc. of the 2nd Intern. Workshop on Field-Programmable Logic and Applications, FPL'92, Vienna, Austria, pp. 7/4.1-7/4.4, August 31-September 2, 1992. The above paper introduced the idea of mapping free Positive Davio Trees directly to layout.
  2. H. Wu, M. A. Perkowski, "Synthesis for Reed-Muller Directed-Acyclic-Graph networks with applications to Binary Decision Diagrams and Fine Grain FPGA Mapping," Proc. of IEEE International Workshop on Logic Synthesis, IWLS '93, Tahoe City, CA, pp. P8d-1 - P8d-6, May 1993.
  3. N. Song, M. A. Perkowski, "A New Design Methodology for Two-Dimensional Logic Arrays," Proc. of IEEE International Workshop on Logic Synthesis, IWLS '93, Tahoe City, CA, pp. 1 - 17, May 1993. The above paper presented for the first time the approach to layout-driven logic synthesis based on Maitra terms and SOP/ESOP factorization
  4. I. Schaefer, M. A. Perkowski, H. Wu, "Multilevel Logic Synthesis for Cellular FPGAs Based on Orthogonal Expansions," Proc. of IFIP W.G. 10.5 Workshop on Applications of the Reed-Muller Expansion in Circuit Design," Hamburg, Germany, September 16-17, pp. 42 - 51, 1993.
  5. L. F. Wu, M. A. Perkowski, "Minimization of Permuted Reed-Muller Trees for Cellular Logic Programmable Gate Arrays," In H. Gruenbacher and R. Hartenstein, (eds.), "Lecture Notes in Computer Science", Number 705, Springer Verlag, pp. 78-87, Berlin/Heidelberg, 1993.
  6. I. Schaefer, M. A. Perkowski, "Synthesis of Multi-Level Multiplexer Circuits for Incompletely Specified Multi-Output Boolean Functions with Mapping Multiplexer Based FPGAs," IEEE Transactions on Computer Aided Design, Vol. 12, No. 11, November 1993, pp. 1655 - 1664.
  7. M. A. Perkowski, "An Overview of EXOR Circuits Synthesis for Fine Grain FPGAs," Special Session of ISMVL '94.
  8. A. Sarabi, N. Song, M. Chrzanowska-Jeske, M. A. Perkowski, "A Comprehensive Approach to Logic Synthesis and Physical Design for Two-Dimensional Logic Arrays," Proc. DAC '94, San Diego, June 1994, pp. 321 - 326.
  9. N. Song, M. A. Perkowski, M. Chrzanowska-Jeske, A. Sarabi, "A New Design Methodology for Two-Dimensional Logic Arrays," VLSI Design, 1995, Vol. 3., Nos. 3-4, pp. 315-332.
  10. M. A. Perkowski, "Logic Synthesis for Motorola/Pilkington Fine Grain Architecture," Presentation for Motorola, Phoenix, Arizona, December 14, 1992. The above presentation showed a new approach to logic minimization for Motorola/Pilkington architecture
  11. M. Perkowski, A. Szepieniec, "System for Logic and Physical Design for Xilinx FPGAs," Presentation for PiE Design Systems, Sunnyvale, California, October 19, 1992.
  12. M. Perkowski, "Logic Synthesis Systems for Cellular FPGAs," Presentation for Kubota Pacific Computer Corp., Santa Clara, California, October 16, 1992. also in Concurrent Logic Corporation, Sunnyvale, California, October 19, 1992.
  13. M. Perkowski, "Comprehensive Design Automation System for Cellular FPGAs," Institute of Automatic Control, Department of Electronics, Technical University of Warsaw, Poland, Sept. 17, 1992.
  14. C. Files, A. Reis, M. A. Perkowski, M. Robert, and Daniel Auvergne, C. Files, A. Reis, M. A. Perkowski, M. Robert, and Daniel Auvergne, "Exact Minimization of Networks with Complex Gates Using Terminal Supressed Binary Decision Diagrams and Dissected Pairs," ULSI Workshop, Santiago De Compostela, Spain, 31 May 1996.

SOFTWARE/HARDWARE APPROACHES TO NEW PLAS, EPLDS AND FPGAS.

  1. M. Perkowski, P. Misiurewicz, "Synthesis of Suboptimal TANT Networks," Proc. of the Conference "Integrated Circuits in the Industrial Control Systems," pp. 62 - 70, (in Polish), Society of Polish Electrical Engineers, Katowice, Poland, 1972.
  2. M. Perkowski, "An Example of Heuristic Programming Application in the Three-Level Combinational Logic Design," Proc. of the 3rd Symposium on Heuristic Methods, Vol. 1, pp. 105 - 132, Polish Cybernetical Society, Warsaw, 25 September 1976.
  3. M. Perkowski, "Synthesis of Multioutput Three Level NAND Networks," Proc. of the Seminar on Computer Aided Design, IFAC - Intern. Federation of Control, pp. 238 - 265, Budapest, Hungary, 3-5 November 1976.
  4. M. Perkowski, H. Uong, H. Uong, "Automatic Design of Finite State Machines with Electronically Programmable Devices," Record of Northcon '87, pp. 16/4.1 - 16/4.15, Portland 1987.
  5. M. A. Perkowski, J. Liu, "A Program for Exact Synthesis of Three-Level NAND Networks," Proc. of the IEEE ISCAS'90, International Symposium on Circuits and Systems, pp. 1118 - 1121, New Orleans, 1-3 May 1990.
  6. M. A. Perkowski, M. Chrzanowska-Jeske, T. Shah, "Minimization of Multioutput TANT Networks for Unlimited Fan-In Network Model," Proc. of the IEEE International Conference on Computer Design, ICCD'90. pp. 360 - 363, Boston, MA, September 1990.
  7. M. A. Perkowski, "Tokenized State Machines and Their Implementation in CY7C361 Device," Cypress Semiconductor Inc., Report, 54 pages, 1990. The above paper presented the Tokenized State Machine model for the first time.
  8. M. Perkowski, L. B. Nguyen, "The Encoding Program for Concurrent Finite State Machines Realized Using PLD Devices," Proc. of the 33rd Midwest Symp. on Circuits and Systems, pp. 204 - 207, Alberta, Canada, August 1990. The above paper showed how to encode networks of state machines.
  9. M. A. Perkowski, "A System of Programs to Implement Tokenized State Machines in Programmable Gate Arrays," ASTI Conference, Eugene, April 1991.
  10. M. A. Perkowski, A. Coppola, "A State Machine PLD and Associated Minimization Algorithms," Proc. of the FPGA'92, 1992 ACM/SIGDA First International Workshop on Field-Programmable Gate Arrays, pp. 109 - 114, Berkeley, February 16-18, 1992.
  11. A. Coppola, M. A. Perkowski, R. Anderson, J. S. Freedman, E. Pierzchala, "Synthesis of Very Fast Distributed Controllers Based on Tokenized State Machine Model," Proc. of IFIP Workshop on Control Dominated RTL Synthesis, Grenoble, France, pp. 1 - 15, September 3-4, 1992.
  12. A. Coppola, M. A. Perkowski, R. Anderson, J.S. Freedman, E. Pierzchala, "Tokenized State Machine Model for Synthesis of Sequential Circuits into EPLDs and FPGAs," In G. Saucier, (ed.), North-Holland, , 1993.
  13. M. A. Perkowski, M. Chrzanowska-Jeske, A. Coppola, E. Pierzchala, "An Exact Solution to the Fitting Problem in the Application Specific State Machine Device," Journal od Circuits, Systems and Computers, Vol. 4, No. 2, pp. 173 - 190, 1994. ~
    ~
  14. M. A. Perkowski, M. Chrzanowska-Jeske, "Multiple-Valued-Input TANT Networks," Proc. ISMVL'94, pp. 334-341, Boston, MA, May 25-27, 1994.
    EXOR_POSTSCRIPTS/jeske-tant-mv.ps = Get postscript of this paper clicking here. The figures are missing. ~
    ~
  15. M. A. Perkowski, M. Chrzanowska-Jeske, A. Coppola, E. Pierzchala, "An Exact Algorithm for the Technology Fitting Problem in the Application Specific State Machine Device," Proc. of the ISCAS'92, International Symposium on Circuits and Systems, pp. 1977 - 1980, San Diego, CA, May 10-13, 1992.

EXCLUSIVE-OR LOGIC.

  1. M. Helliwell, M. A. Perkowski, "A Fast Algorithm to Minimize Multi-Output Mixed-Polarity Generalized Reed-Muller Forms," Proc. of the IEEE/ACM 25-th Design Automation Conference, pp. 427 - 432, Anaheim, CA, June 12-15, 1988. The above paper introduced EXORCISM algorithm for the first time. ~
    ~
  2. M. A. Perkowski, M. Chrzanowska-Jeske, "An Exact Algorithm to Minimize Mixed-Radix Exclusive Sums of Products for Incompletely Specified Boolean Functions," Proc. of the IEEE ISCAS'90, International Symposium on Circuits and Systems, pp. 1652 - 1655, New Orleans, 1-3 May 1990.
    EXOR_POSTSCRIPTS/jeske-iscas-90.ps = Get postscript of this paper clicking here. The above paper introduced exact algorithm for ESOP minimization for the first time.

INTEGRATED SYSTEM >>DIADES<< FOR DIGITAL DESIGN AUTOMATION.

  1. B. J. Falkowski, M. A. Perkowski, "On the Calculation of Generalized Reed-Muller Canonical Expansions from Disjoint Representation of Boolean Functions," Proc. of the 33rd Midwest Symp. on Circuits and Systems, pp. 1131 - 1134, August 1990, Alberta, Canada.
  2. L. Csanky, M. Perkowski, I. Schaefer, "Canonical Restricted Mixed-Polarity Exclusive Sums of Products," Proc. of the IEEE ISCAS'92, International Symposium on Circuits and Systems, pp. 17 - 20, San Diego, CA, May 10-13, 1992. The above paper introduced efficient GRM minimization algorithm for the first time.
  3. M. Perkowski, L. Csanky, A. Sarabi, I. Schaefer, "Minimization of Mixed-Polarity Canonical AND/EXOR Forms," Proc. of the IEEE International Conference on Computer Design, ICCD'92, Boston, October 11-13, pp. 32 - 36, 1992.
  4. B. J. Falkowski, M. A. Perkowski, "One More Way to Calculate Generalized Reed-Muller Expansions of Boolean Functions," International Journal of Electronics. Vol. 71, No. 3, pp. 385 - 396, 1991.
  5. L. Csanky, M. Perkowski, I. Schaefer, "Canonical Restricted Mixed-Polarity Exclusive-Or Sums of Products and the Efficient Algorithm for their Minimization," IEE Proceedings, Pt.E, Vol. 140, No. 1, pp. 69 - 77, January 1993.
  6. N. Song, M. A. Perkowski, "EXORCISM-MV-2: Minimization of Exclusive Sum of Products Expressions for Multiple-Valued Input Incompletely Specified Functions," Proc. of the 23nd IEEE International Symposium on Multiple Valued Logic, ISMVL '93, pp. 132 - 137, Sacramento, CA, May 24-27, 1993. The above paper introduced efficient MV ESOP minimization algorithm for the first time.
  7. N. Song, M. Perkowski, "Minimization of Exclusive Sum of Products Expressions for Multi-Output Multiple-Valued Input, Incompletely Specified Functions," IEEE Transactions on Computer Aided Design, Vol. 15, No. 4, April 1996, pp. 385-395.
    .
    Click to get postscript of this paper
  8. M. Perkowski, "Unified Approach to Canonical Representations in EXOR Logic," National Conference on Circuits and Systems, Krynica, Poland, 1996. Invited Address, October 25, 1996. The above paper introduced a new generalized approach to Linearly Independent Expansions for the first time.
  9. T. Sasao, M. Perkowski, "EXOR Logic Synthesis," Kluwer Academic Publishers, book in preparation.

DECISION DIAGRAMS AND NEW REPRESENTATIONS OF DISCRETE FUNCTIONS.

  1. M. Perkowski, "Optimization of Semiregular VLSI Layouts," Electrical Engineering Colloquium, University of Minnesota, December 2, 1982. The above paper introduced how to use Binary Decision Diagrams and Tables of Akers to layout design from pass transistors. Many new ideas were introduced here, that have not been published then.

  2. M. A. Perkowski, P. Dysko, B. J. Falkowski, "Two Learning Methods for a Tree-Search Combinatorial Optimizer," Proc. of IEEE International Phoenix Conference on Computers and Communication, pp. 606 - 613, Scottsdale, Arizona, March 1990. The above paper introduced EXOR decision diagrams for the first time, that were more general than FDDs and KFDDs.
  3. M. A. Perkowski, P. D. Johnson, "Canonical Multivalued-Input Reed-Muller Trees and Forms," Proc. of the Third NASA Symposium on VLSI Design, pp. 11.3.1-11.3.13, Moscow, Idaho, October 30-31, 1991.
      The above paper introduced several types of new EXOR-based decision diagrams and forms for binary and MV-input logic.
  4. M. A. Perkowski, "The Generalized Orthonormal Expansion of Functions with Multiple-Valued Inputs and Some of its Applications," Proc. of the 22nd IEEE International Symposium on Multiple Valued Logic, ISMVL'92, pp. 442 - 450, Sendai, Japan, May 27-29, 1992.
      The above paper introduced several types of new EXOR-based decision diagrams and forms for binary and MV-input logic, including KFDDs.
  5. A. Sarabi, P. F. Ho, K. Iravani, W. R. Daasch, M. A. Perkowski, "Minimal Multi-Level Realization of Switching Functions Based on Kronecker Functional Decision Diagrams," Proc. of IEEE International Workshop on Logic Synthesis, IWLS '93, Tahoe City, CA, pp. P3a-1 - P3a-6, May 1993.
      The above paper introduced the Kronecker Decision Diagrams for the first time. First implementation of OKFDDs. Only for small functions.
  6. R. Drechsler, A. Sarabi, M. Theobald, B. Becker, M. A. Perkowski, "Efficient Representation and Manipulation of Switching Functions Based on Kronecker Functional Decision Diagrams," Proc. DAC '94, San Diego, June 1994, pp. 415 - 419.
      Second, good implementation of OKFDDs.
  7. S. Grygiel, M. Perkowski, M. Marek-Sadowska, T. Luba, and L. Jozwiak, "Cube Diagram Bundles, A New Representation of Strongly Unspecified Multiple-Valued Functions and Relations," Proc. ISMVL'97, Antigonish, Nova Scotia, May 1997.
  8. P. Ho, M. A. Perkowski, "Free Kronecker Decision Diagrams and their Application to ATMEL 6000 FPGA Mapping," Proc. Euro-DAC '94 with Euro-VHDL'94, pp. 8 - 13, September 19-23, 1994, Grenoble France. EXOR_POSTSCRIPTS/euro-94.ps = Click here to get postscript wihout figures.
    .
      The above paper introduced the Free Kronecker Decision Diagrams for the first time.
  9. M. Perkowski, A. Sarabi, I. Schaefer, "Multi-Level Logic Synthesis Based on Kronecker and Boolean Ternary Decision Diagrams for Incompletely Specified Functions," Computer Aided Design and Test, Dagstuhl-Seminar-Report, 105, 13 Febr - 17 Febr, 1995, Germany.
      The above paper presented Boolean ternary decision diagrams with 12 expansion types
  10. M. A. Perkowski, I. Schaefer, A. Sarabi, M. Chrzanowska-Jeske, "Multi-level Logic Synthesis Based on Kronecker Decision Diagrams and Boolean Ternary Decision Diagrams for Incompletely Specified Functions," VLSI Design, 1995, Vol. 3., Nos. 3-4, pp. 301-313.
    EXOR_POSTSCRIPTS/zobrist-sarabi.ps = Click here to get postscript wihout figures.
    .
  11. H. Wu, N. Zhuang, M. A. Perkowski, "Synthesis for Reed-Muller Directed-Acyclic-Graph network," IEE Proceedings, Pt. E.
      The above paper presented new approach to build DAG networks, starting from leafs rather from a root.

GALOIS LOGIC.

  1. Q. Hong, B. Fei, H. Wu, M. A. Perkowski, N. Zhuang, "Fast Synthesis for Ternary Reed-Muller Expansion," Proc. of the 23rd IEEE International Symposium on Multiple Valued Logic, ISMVL '93, pp. 14 - 16, Sacramento, CA, May 24 - 27, 1993.
  2. B. Fei, Q. Hong, H. Wu, M. A. Perkowski, N. Zhuang, "Efficient Computation for Ternary Reed-Muller Expansions under Fixed-Polarities," International Journal of Electronics, Vo. 75, No. 4., pp. 685 - 688, 1993.
  3. M. A. Perkowski, A. Sarabi, and F. R. Beyl, "Fundamental Theorems and Families of Linearly Independent Forms for Binary and Multiple Valued Logic", Proc. of the Second Workshop on Applications of Reed-Muller Expansion in Circuit Design, Chiba City, Japan, 27-29 August 1995, pp. 288-299.

MULTIPLE-VALUED EXOR LOGIC.

  1. M. A. Perkowski, M. Helliwell, P. Wu, "Minimization of Multiple-Valued Input, Multi-Output Mixed-Radix Exclusive Sums of Products for Incompletely Specified Boolean Functions," Proc. of the 19th ISMVL, International IEEE Symposium on Multiple-Valued Logic, pp. 256 - 263, Guangzhou, People's Republic of China, May 1989.
  2. I. Schaefer, M. A. Perkowski, "Multiple-Valued Input Generalized Reed-Muller Forms," Proc. of the 21th IEEE International Symposium on Multiple Valued Logic, ISMVL'91, pp. 40 - 48, Victoria, British Columbia, May 1991.
  3. I. Schaefer, M. A. Perkowski, "Multiple Valued Input Generalized Reed-Muller Forms," IEE Proceedings, Pt.E, Vol. 139, No. 6., pp. 519 - 527, November 1992.
  4. N. Song, M.A. Perkowski, `` New Fast Approach to Approximate ESOP Minimization for Incompletely Specified Multi-Output Functions''. Under review, RM'97 Worshop.
    New paper about Esop Minimization. EXORCISM-MV-3 is up to 141 times faster than EXORCISM-MV-2, and has approximately the same quality. It uses look-ahead search strategy.

    RESEARCH AREAS RELATED TO ADVANCED LOGIC CLASS EE 573/EE 673, CONTROL UNIT DESIGN.

STATE MINIMIZATION AND STATE ASSIGNMENT OF SYNCHRONOUS AND ASYNCHRONOUS MACHINES

  1. M. Perkowski, A. Rydzewski, P. Misiurewicz, "Theory of Logic Circuits, Selected Problems," Publishers of the Technical University of Warsaw, Ed. 1 - 1977, Ed. 2 - 1978, Ed. 3 - 1984, 314 pages in Polish. The above book included many ideas subsequently published in improved versions.
  2. H. Kruszynski, P. Misiurewicz, M. Perkowski, A. Rydzewski, "Problems in the Theory of Logic Circuits," Publishers of the Technical University of Warsaw, Ed. 1 - 1976, Ed. 2 - 1977, Ed. 3 - 1979, Ed. 4 - 1986, 322 pages in Polish.
  3. P. Misiurewicz, M. Perkowski, "Theory of automata," Ed. 1 - 1973, Ed. 2 - 1974, Ed. 3 (updated) - 1976, Publishers of the Technical University of Warsaw, 250 pages in Polish.
  4. M. Perkowski, A. Zasowska, "Minimal Area MOS Asynchronous Automata," Proc. of the International Symposium on Applied Aspects of Automata Theory, pp. 284 - 298, Warna, Bulgaria, 14-19 May 1979.
  5. A. Zasowska, M. Perkowski, "The Computer-Oriented Method for Joint Minimization and State-Assignment in Synchronous and Asynchronous Automata," Proc. of the Conference "Application of Digital Computers in Engineering Design," Society of Polish Electrical Engineers, SEP, pp. 31- 42, (in Polish), Katowice 1979. The above paper proposed the model of concurrent minimization and state assignment of FSMs.
  6. E. B. Lee, M. Perkowski, "A New Approach to Structural Synthesis of Automata," Department of Electrical Engineering, University of Minnesota, 84 pages, 1982.
  7. E. B. Lee, M. Perkowski, "Concurrent Minimization and State Assignment of Finite State Machines," Proc. of the 1984 IEEE Intern. Conf. on Systems, Man, and Cybernetics, pp. 248 - 260, Halifax, Nova Scotia, Canada, October 9 - 12, 1984.
  8. M. Perkowski, "Automatic Design of Finite State Machines," Presentation in Electronics Laboratories, General Electric Company, Corporate Research and Development, Schennectady, N.Y. 12301, invited, April 22, 1985.
  9. M. Perkowski, "TEA - Expert Program for State Assignment," Presentation in GTE Laboratories Inc., September 27, 1985.
  10. M. Perkowski, "Assignment of Internal States, Inputs and Outputs in a ''Team of Experts'' (TEA) program," Presentation in GTE GTE Laboratories Incorporated, 35 pages, September 1985. The above unpublished report included a multi-expert approach to state assignment and input-based decomposition of synchronous FSMs. One of methods used the concept of generalized MV implicants.
  11. M. Perkowski, "Design of Finite State Machines with SuperPeg," Seminar of Department of Electrical Engineering, Oregon State University, Corvallis, Oregon, invited, February 12, 1985.
  12. M. Perkowski, N. Nguyen, "Minimization of Finite State Machines in System SuperPeg," Proc. of the Midwest Symposium on Circuits and Systems. pp. 139 - 147, Luisville, Kentucky, 22-24 August 1985. The above paper presented a tree-search approach to exact state minimization
  13. M. Perkowski, "Digital Design Automation - Finite State Machine Design," Record of Northcon '86, pp. 11/0.1 - 11/0.14, Seattle, Sept. 30 - Oct. 2, 1986.
  14. M. A. Perkowski, J. Liu, "Generation of Finite State Machines from Parallel Program Graphs in DIADES," Proc. of the IEEE ISCAS'90, International Symposium on Circuits and Systems, pp. 1139 - 1142, New Orleans, 1-3 May 1990. The above paper showed how to convert high-level HDL language to parallel machines.
  15. M. A. Perkowski, J. Brown, "Automatic Generation of Don't Cares for the Controlling Finite State Machine from the Corresponding Behavioral Description," Proc. of the IEEE ISCAS'90, International Symposium on Circuits and Systems, pp. 1143 - 1146, New Orleans, 1-3 May 1990. The above paper showed how to use the constraints generated in data path to introduce don't cares for control unit machine.
  16. M. A. Perkowski, W. Zhao, D. Hall, "Concurrent Two-Dimensional State Minimization and State Assignment of Finite State Machines," Proc. of the IEEE International Conference "VLSI Design '92," pp. 80 - 84, Bangalore, India, January 4-7, 1992. The above paper introduced a new model of Two-Dimensional State Minimization and Assignment.

DYDACTIC EQUIPMENT FOR LABORATORIES

  1. M. Perkowski, "Digital Systems Laboratory of the Institute of Automatic Control, Warsaw Technical University," Proc. of the 1984 ASEE Annual Conference, Salt Lake City, Utah, 24-28 June 1984, pp.. 204 - 211.

RESEARCH AREAS RELATED TO ADVANCED LOGIC CLASS EE 574/EE 674.

INTEGRATED SYSTEM FOR DIGITAL DESIGN AUTOMATION.

  1. M. Perkowski, "A System for Automatic Design of Digital Systems," Proc. of the Conference "Modern problems of Automatic Control and Computer Science," Society of Polish Electrical Engineers, SEP, pp. 274 - 305 (in Polish), Gliwice, Poland, 18-20 Sept. 1973.
  2. M. Perkowski, "A System for Automatic Design of Digital Systems," Proc. of the FCIP Symposium INFORMATICA 74, pp. 4.4/1-4.4.11, Bled, Yugoslavia, 7-12 October 1974.
  3. M. Perkowski, "A System for Automatic Design of Digital Systems," Symposium on behalf of the 25th Anniversary of the School of Electronics of the Technical University of Warsaw, Warsaw, 25-27 November, 1976, pp. 81 - 82, (in Polish).
  4. M. Perkowski, "Design of Digital systems in the System for Automatic Design DIADES," Proc. of the 7th National Conference of Automatic Control, Vol. 1, pp. 745 - 754 (in Polish), Rzeszow, Poland, 15-17 September 1977.
  5. M. Perkowski, "Automatic Design of Digital MOS LSI Circuits in System DIADES," Measurement, Automatics, Control (Pomiary, Automatyka, Kontrola), No. 6, pp. 226 - 228, (in Polish), 1979.
  6. M. Perkowski, "Automatischer Entwurf von MOS-LSI-digitalen Schaltungen in System DIADES," Messen, Steuern, Regeln, No. 6, pp. 346 - 350, East Germany, (in German), 1979.
  7. M. Perkowski, "A System for Automatic Design of Digital Systems," Magyar Tudomanyos Akademia, Szamitastechnikai Es Automatizalesi Kutato Intezete, Budapest Tanulmanyok, Hungary, No. 99, pp. 93 - 112, (in Russian), 1979.
  8. M. Perkowski, "6 Lectures on DIADES Design Automation System," a series of 6 presentations to the CAD engineers, Honeywell Solid State Electronics Division (SSED), Minneapolis, Fall 1981 and Winter 1982.
  9. M. Perkowski, "VLSI Circuit Design Automation - the DIADES System," Electrical Engineering Seminar, EE Department, University of Minnesota, February 1982,
  10. M. Perkowski, "Hierarchical Design Automation System for VLSI," Seminar of Dept. of Electrical Engineering, University of Wisconsin, Madison, May 6, 1983.
  11. M. Perkowski, "DIADES," ACM/IEEE Workshop: Beyond Behavioral Synthesis, Santa Barbara, California, April 30 - May 2, 1986.
  12. M. Perkowski, D. Smith, "Intelligent User Interface for the DIADES VLSI Design Automation System," Record of Northcon '86, pp. 11/2.1 - 11/2.14, Seattle, Sept. 30 - Oct. 2, 1986.
  13. M. Perkowski, D. Smith, J. Liu, P. Wu, et al., "Final Report to Sharp Microelectronics about DIADES system implementation," SHARP Microelectronics Technology, 3 volumes, August 1988.
  14. M. A. Perkowski, D. Smith, M. Driscoll, J. Liu, J. E. Brown, "DIADES - A High-Level Synthesis System," Proc. of the IEEE 1989 ISCAS - International Symposium on Circuits and Systems, pp. 1895 - 1898, May 9-11, 1989.
  15. M. A. Perkowski, M. Driscoll, J. Liu, D. Smith, J. Brown, L. Yang, A. Shamsapour, M. Helliwell, B. Falkowski, P. Wu, M. Ciesielski, A. Sarabi, "Integration of Logic Synthesis and High-Level Synthesis into the DIADES Design Automation System," Proc. of the IEEE 1989 ISCAS - International Symposium on Circuits and Systems, pp. 748 - 751, Portland, OR, May 9-11, 1989.

    LOGICAL SCHEMATA AND MICROPROGRAMMING

    1. L. Yang, M. A. Perkowski, D. Smith, "Automated Synthesis of Microprogrammed Control Units in Diades," Proc. of the ISCAS'92, International Symposium on Circuits and Systems, pp. 1973 - 1976, San Diego, CA, May 10-13, 1992.
    2. M. Perkowski, "Application of logical schemata of algorithms to the synthesis of automata," Institute of Automatic Control, Technical University of Warsaw, 247 pages in Polish, 1970.

    RESEARCH AREAS RELATED TO VHDL.

    VHDL SYSTEMS.

    1. R. Anderson, A. Coppola, J. Freedman, M. A. Perkowski, "VHDL Synthesis of Concurrent State Machines to a Programmable Logic Device," Proc. of the IEEE VHDL International User's Forum, May 3 - 6, Scottsdale, Arizona, 1992. The above paper presented the WARP VHDL Compiler of Cypress for the first time and obtained the Best Paper Award.
    2. M. Perkowski, M. Chrzanowska-Jeske, "Reconfigurable Computing with VHDL and Prototyping Engines." This is a book that we are writing for DEC-PERLE-1 Emulator.

    ADL AND "OBJECT ORIENTED ADL" HARDWARE DESCRIPTION LANGUAGES.

    1. M. Perkowski, Cz. Mankiewicz, ADL - the Source Language of the System for Automatic Block Synthesis of Digital Systems of Automatic Control," Proc. of the II-nd Symposium "System, Modeling, Control," pp. 91 - 93, (in Polish), Zakopane, Poland, 27-30 May 1974. The above paper introduced the ADL hardware description language for the first time.
    2. M. Perkowski, J. Baranowski, "Design of Digital Systems Using the Programming Language ADL," Institute of Automatic Control, Technical University of Warsaw, 120 pages, (in Polish), 1976.
    3. M. Perkowski, "ADL - source language of the system for automatic design of digital systems," In R. Marczynski, (ed.), "Organization of digital computers and microprogramming," Polish Scientific Publishers (PWN), Lodz, Vol. 1, pp. 167-180, invited, 1976.
    4. E. B. Lee, Ch. Kim , M. Perkowski, "An Approach to Custom Design of VLSI Circuit Design Automation," Microelectronic and Information Sciences Center, University of Minnesota, Technical Report # 10, 55 pages, May 1984.
    5. M. Perkowski, B. Falkowski, "Full Formal Description of Language ADL," Report of Department of Electrical Engineering, PSU, 48 pages, 1987.
    6. L. Yang, M. A. Perkowski, D. Smith, A. Shamsapour, "Object-Oriented Design of an Expandable Hardware Description Language Analyzer for a High-Level Synthesis System," Proc. of the ACM 25-th Hawaii International Conference on System Sciences, pp. 529 - 538, Koloa, Hawaii, January 7-10 1992.

    RESEARCH AREAS RELATED TO DESIGN FOR TEST CLASS. (A NEW CLASS).

    TESTING, AND EASILY TESTABLE LOGIC DESIGN.

    1. M. Perkowski, "An Application of Heuristic Search Strategy in the Multiple, Adaptive Identification Experiment with Finite State Machines," Proc. of the First National Symposium on Heuristic Methods, pp. 135 - 152, (in Polish), Polish Cybernetical Society, PTC, Warsaw, 28 Sept. 1974.
    2. M. Perkowski, "Multiple Adaptive Identification Experiment with An Automaton," Institute of Automatic Control, Technical University of Warsaw, 1975.
    3. M. Perkowski, K. Jankowski, "Validation and Optimization of Control Automata Programs in the System for Automatic Design," Proc. of the International Symposium "Fault Diagnosis of Digital Networks and Fault-Tolerent Computing," pp. 104 - 112, Wisla, Poland, 25-27 May 1976.
    4. M. Perkowski, "A Method of Validation of Parallel Programs in the System for Automatic Design of Block-Oriented Digital Systems," Proc. of the 2nd IFAC Symposium on Discrete Systems, Dresden, East Germany, 13-19 March 1977.
    5. M. Perkowski, "Symbolic Analysis of (Sequential and Parallel) Program Schemata in the Digital Design Automation System," Institute of Automatic Control, Technical University of Warsaw, 1979, 41 pages.
    6. M. Perkowski, "Self-Test Cum Self-Repair," Proc. of IEEE Test Technology Workshop, pp. 139 - 147, Minnesota, 15-17 November 1983.
    7. M. Perkowski, D. Smith, R. Krzywiec, "A Logic Simulation/Design/Verification Environment in Prolog," Proc. of the 17th Annual Pittsburgh Conference on Modeling and Simulation, pp. 945 - 958, Pittsburgh, Pennsylvania, 24-25 April, 1986.
    8. T. Caominh, M. Perkowski, "Logic/Register-Transfer Simulator with Visualization," Record of Northcon '86, pp. 11/3.1 - 11/3.6, Seattle, Sept. 30 - Oct. 2, 1986.
    9. H. V. D. Le, M. A. Perkowski, "Real Time Graphical Simulation of Systolic Arrays," Proc. of the IEEE 1989 ISCAS - International Symposium on Circuits and Systems, pp. 171 - 174, Portland, OR, May 9-11, 1989.
    10. A. Sarabi, M. A. Perkowski, "Fast Exact and Quasi-Minimal Minimization of Highly Testable Fixed-Polarity AND/XOR Canonical Networks," Proc. of the IEEE/ACM Design Automation Conference, pp. 30 - 35, Anaheim, CA, June 8-12, 1992.
    11. H. Wu, N. Zhuang, M. A. Perkowski, "Novel CMOS Scan Design for VLSI Testability," Proc. of the 23nd IEEE International Symposium on Multiple Valued Logic, ISMVL '93, pp. 82 - 86, Sacramento, CA, May 24-27, 1993.
    12. A. Sarabi, M. A. Perkowski, "Design for Testability Properties of AND/XOR Networks," Proc. of IFIP W.G. 10.5 Workshop on Applications of the Reed-Muller Expansion in Circuit Design," Hamburg, Germany, September 16-17, pp. 147 - 153, 1993.
      .
      EXOR_POSTSCRIPTS/test-sarabi.ps = Here click for postscript without figures.
    13. H. Wu, M. A. Perkowski, "Novel CMOS Scan Design for VLSI Testability," IEE Proceedings, Pt. E.
    14. X. Zeng, M. A. Perkowski, H. Wu, and A. Sarabi, "A New Efficient Algorithm for Finding Exact Minimal Generalized Partially-Mixed-Polarity Reed-Muller Expansion," Proc. of the Second Workshop on Applications of Reed-Muller Expansion in Circuit Design, Chiba City, Japan, 27-29 August 1995, pp. 231-239.
    15. X. Zeng, M. A. Perkowski, K. Dill, and A. Sarabi, "Approximate Minimization of Generalized Reed-Muller Forms," Proc. of the Second Workshop on Applications of Reed-Muller Expansion in Circuit Design, Chiba City, Japan, 27-29 August 1995, pp. 221-230.
    16. H. Wu, M. A. Perkowski, N. Zhuang, "Generalized Partially-Mixed-Polarity Reed-Muller Expansion and its Fast Computation," IEEE Transactions on Computers, Vol. 45, No. 9, pp. 1084-1088, September 1996.
    17. Ch. Landreau, "Testability and Design for Test", (M. Perkowski, translation of a textbook from French).

    RESEARCH AREAS RELATED TO INTELLIGENT ROBOTICS I.

    The Intelligent Robotics sequence of two classes includes a wide array of problems related to developing intelligent machines. It covers programming in Lisp and Prolog, automatic theorem proving, search methods, problem solving, induction and analogy, symbol manipulation techniques, Machine Learning, Image Processing, Pattern Recognition, robotics for handicapped, mobile robotics, control of robots, navigation and orientation. This section includes research on Mobile Robotics, Lisp and Symbol manipulation in scientific computing, tree search methods and general problem solving, automatic theorem proving, Image processing with medical applications, and other.

ANALYTIC CALCULATIONS AND SYMBOL MANIPULATION.

  1. M. Perkowski, A. Krasinski, "Computer Nonnumerical Programs in Physics," Proc. of the XVIII Congress of the Polish Astronomical Society. (in Polish), Olsztyn, Poland, 20-23 September 1977.
  2. A. Krasinski, M. Perkowski, "Symbolic Algebraic Computer Programs. Part I - programming language LISP," Progress in Astronomy (Postepy Astronomii), Vol. XXV, No. 4, pp. 203 - 211, (in Polish), 1977.
  3. A. Krasinski, M. Perkowski, "Symbolic Algebraic Computer Programs. Part II - applications and perspectives," Progress in Astronomy, Vol. XXVI, No. 1, pp. 33 - 49, (in Polish), 1978.
  4. A. Krasinski, M. Perkowski, "ORTOCARTAN - A Computer Program for Calculating Curvature Tensors in General Relativity," Report of the Nicolaus Copernicus Center of Astronomy of Polish Academy of Sciences, 32 pages, October 1979.
  5. A. Krasinski, M. Perkowski, "The System ORTOCARTAN. Instruction for Users," Report of the Nicolaus Copernicus Center of Astronomy of Polish Academy of Sciences, 83 pages, First Edition 1979; 90 pages, Second Edition 1980.
  6. A. Krasinski, M. Perkowski, "ORTOCARTAN - a New Computer Program for Analytic Calculations in General Relativity," General Relativity and Gravitation, Vol. 13, No. 1, pp. 67 - 77, 1981.
  7. A. Krasinski, M. Perkowski, "ORTOCARTAN - A New Computer Program for Algebraic Calculations," Computer Physics Communications, 22, pp. 269 - 271, 1981.
  8. J. Baranowski, M. Perkowski, "Programming in Language LISP," Institute of Automatic Control, Technical University of Warsaw, 1981.
  9. M. Perkowski, A Goralski, G. Zielinski, "Elements of Artificial Intelligence," Institute of Automatic Control, Technical University of Warsaw, 384 pages, 1982.
  10. A. Krasinski, M. Perkowski, "The System ORTOCARTAN. User's manual," Upgraded Edition, 90 pages, University of Cologne, Cologne, Federal Republic of Germany, October 1983.
  11. A. Krasinski, Z. Otwinowski, M. Perkowski, "The System ORTOCARTAN for Analytic Calculations. Detailed Description," Report of the Nicolaus Copernicus Center of Astronomy of Polish Academy of Sciences, 95 pages, October 1979, second edition 1984.
  12. A. Krasinski, Z. Otwinowski, M. Perkowski, "The System ORTOCARTAN for Analytic Calculations. Detailed Description," Third improved edition, (M. Kwasniewski - ed.), Regional Computer Centre Cyfronet, Krakow, Poland, April 1984. New edition for Atari computers, 1992, 99 pages.

REASONING BY ANALOGY, INDUCTION, AUTOMATIC THEOREM PROVING.

  1. M. Perkowski, A. Furmanik, J. Mikke, M. Strzelec, K. Zielinski, J. Zniszczynski, A. Goralski, "Variations on the Quadrangle (On Automatic Construction and Generalization of Problems - the Examples from Solid Geometry)," Proc. of the 3rd Symposium on Heuristic Methods, Vol. 1, pp. 181 - 198, (in Polish), Polish Cybernetical Society, Warsaw, 25 September 1976. The above paper presented the method to generate interesting problems-theorems for an automatic theorem prover. This is also the last paper written by my Grandfather, Kazimierz Zielinski, professor of mathematics at Warsaw Technical University.
  2. M. Perkowski, "Some Concepts on Reasoning by Analogy. The Heuristic Programming Approach," Proc. of the IVth International Symposium on Heuristic Methods, Polish Cybernetical Society, PTC, Vol. 2, pp. 25 - 119, Warsaw, 24 September, 1977. The above paper introduced a new model of reasoning by analogy for Prolog-like languages.
  3. M. Perkowski, "Heuristic Methods in Computer Science," In A. Goralski, (ed.), "Problem method solution," Collection 1, Scientific-Technical Publishers (WNT), (in Polish), 1977.
  4. S. Magierska, M. Perkowski, "On Analogy and its Formal Models," In A. Goralski, (ed.), "Problem, method, solution," Collection 2, Scientific - Technical Publishers, (in Polish), pp. 75-124, 1978.
  5. M. Perkowski, "Artificial Intelligence Languages," Proc. of the Vth Symposium on Heuristic Methods, Polish Cybernetical Society, PTC, pp. 71 - 108, (in Polish), Warsaw 1979.
  6. E. Dobrzynska, M. Perkowski, "Description of the Problem Instead of the Description of the Solution Process: Heuristic Programming Languages," In A. Goralski, (ed.), "Problem, method, solution," Collection 3, Scientific - Technical Publishers, (in Polish), pp. 167-199, 1980.
  7. M. Perkowski "General Methods for Solving Combinational Problems," In A. Goralski, (ed.), "Problem, method, solution," Vol. 4, Scientific-Technical Publishers, Warszawa, Poland, (in Polish), pp. 110-149, 1982.
  8. M. Perkowski, M. Gluch, "Knowledge Engineering Language Using Strategies (KELUS)," Institute of Automatic Control, Technical University of Warsaw, 1979.

"INTELLIGENT ROBOTICS II">

HIGHLY PARALLEL HARDWARE ARCHITECTURES.

  1. M. A. Perkowski, "A Systolic Processor for Approximate Solutions to NP-Complete Combinatorial Problems," Symposium on Complexity of Approximately Solved Problems. Computer Science Department, Columbia University, New York, April 17 -19 , 1985.
  2. M. Perkowski, P. A. Frick, "Systolic Architecture for Multiplication of Polynomials and its Applications in Robotics," Proc. of Northcon '85, pp. 14/1.1 - 14/1.9, Portland, 1985.
  3. M. Perkowski, "Systolic Architecture for the Logic Design Machine," Proc. of the IEEE and ACM International Conference on Computer Aided Design - ICCAD 85, pp. 133 - 135, Santa Clara, 19-21 November 1985.
  4. M. A. Perkowski, "Logic Design Machine," CAD Group Invited lecture, Department of Electrical Engineering, Carnegie Mellon University, April 1986.
  5. M. A. Perkowski, "On the Reduction of Combinatorial Problems and Parallel Computers for Solving Generic Combinatorial Problems," System Science Seminar PSU, February 11 1986.
  6. H. V. D. Le, M. A. Perkowski, "A New General Purpose Systolic Architecture for Matrix Computations," Proc. of the Intern. Conf. on Computer and Information Systems, pp. 182 - 185, Toronto, Ontario, Canada, May 23-29, 1989.
  7. H. V. D. Le, M. A. Perkowski, "Size Independent Implementation of Matrix Operations on TASA - A Two-Dimensional Array Matrix Architecture," Proc. of the IEEE International Phoenix Conference on Computers and Communication, pp. 889 - 890, Scottsdale, Arizona, March 1990.
  8. H. V. D. Le, M. A. Perkowski, "Realization of Extensions to Faddev Algorithm on Array of SIMD Processors," Proc. of the IEEE ISCAS'90, International Symposium on Circuits and Systems, pp. 2312 - 2315, New Orleans, 1-3 May 1990.
  9. P. M. Ho, M. A. Perkowski, "Systolic Architecture for Solving NP-Hard Combinatorial Problems of Logic Design and Related Areas," Proc. of the IEEE 1989 ISCAS - International Symposium on Circuits and Systems, pp. 1170 - 1173, Portland, OR, May 9-11, 1989.
  10. M. A. Perkowski, "A Universal Logic Machine," invited address, Proc. of the 22nd IEEE International Symposium on Multiple Valued Logic, ISMVL'92, pp. 262 - 271, Sendai, Japan, May 27-29, 1992.
  11. L. S. Kida, M. A. Perkowski, "The Cube Calculus Machine: A Ring of Asynchronous Automata to Process Multiple-Valued Boolean Functions," Proc. of the ISCAS'92, International Symposium on Circuits and Systems, pp. 807 - 810, San Diego, CA, May 10-13, 1992.
  12. C. Espinosa, M. A. Perkowski, "Hierarchical Hough Transform Based on Pyramidal Architecture," Proc. of the IPCCC'92, IEEE International Phoenix Conference on Computers and Communications, pp. 0743 - 0750, Scottsdale, Arizona, April 1-4, 1992.
  13. M. A. Perkowski, "Configurable Systolic Computer based on Fine Grain Field Programmable Gate Arrays and Reed-Muller Logic Synthesis," Presentation for Apple Computer Laboratories, 20525 Mariani Ave, Cupertino, California, June 11, 1992. Also in Adaptec Corporation, California, July 1992.
  14. M. A. Perkowski, "Universal Logic Machine," Tohoku Imperial University, Sendai, Japan, invited speaker, May 1992.
  15. M. A. Perkowski, "FPGA Computer Architectures and Software for them," Presentation for the management from Litton Data Systems, ASTI, University of Oregon, invited, February 1993.
  16. M. A. Perkowski, "FPGA Computer Architectures," Proc. of Northcon '93, pp. 87 - 92, Portland, Oregon, October 12 - 14, 1993.
  17. M. A. Perkowski, L. Jozwiak, D. Foote, "Architecture of a Programmable FPGA Coprocessor for Constructive Induction Approach to Machine Learning and other Discrete Optimization Problems", Proc. 4th Reconfigurable Architectures Workshop, Part of the 11th International Parallel Processing Symposium, IEEE Techn. Comp. Society Techn. Committee on Parallel Processing and ACM Special Interest Group on Comp. Architecture, Geneva, Switzerland, April 1-5, 1997.
  18. M. A. Perkowski, P. Lech, Hardware Realization to Minimize Incompletely Specified Functions 6th Workshop on Post-Binary Ultra-Large-Scale Integration Systems, St. Francis Xavier University, Antigonish, Nova Scotia, Canada, May 27, 1997.

FIELD PROGRAMMABLE ANALOG ARRAYS.

  1. E. Pierzchala, W. Nikiel, M. A. Perkowski, "Knowledge-Based Extension of DIADES System for the Analysis and Synthesis of TGC Circuits," Proc. of the 33rd Midwest Symp. on Circuits and Systems, pp. 989 - 992, Alberta, Canada, August 1990.
  2. E. Pierzchala, M. A. Perkowski, "High Speed Field Programmable Analog Array Architecture Design," Proc. of the FPGA'94, 1994 ACM/SIGDA Second International Workshop on Field-Programmable Gate Arrays, Session 4. pp. 1-10, Berkeley, February 1994.
  3. E. Pierzchala, M. A. Perkowski, S. Grygiel, "A Field Programmable Analog Arrray for Continuous, Fuzzy and Multi-Valued Logic Applications," Proc. ISMVL'94, pp. 148 - 155, Boston, MA, May 25-27, 1994.
  4. E. Pierzchala, M. A. Perkowski, P. Van Halen, R. Schaumann, "Current-mode Amplifier/Integrator for a Field-Programmable Analog Array," Intern. Solid State Circuit Conference Dig. Technical Papers, San Francisco, February 1995.
  5. E. Pierzchala, R. Schaumann, P. Van Halen, S. Szczepanski, M. A. Perkowski, "Highly Linear VHF Current Mode Miller Integrator with 90 dB DC Gain," Proc. ISCAS 1995, pp. 1852-1859.

INDUSTRIAL AND RAILWAY AUTOMATION.

  1. M. Perkowski, "Multichannel Digital PID Controller," Part 1, Principles. Part 2, Algorithms and Diagrams," Institute of Automatic Control, Technical University of Warsaw, 83 pages, (in Polish), 1971.
  2. W. Traczyk, P. Misiurewicz, J. Kostro, M. Perkowski, A. Rydzewski, K. Sacha, "A System of Automatic Control for the Central Railroad," Institute of Automatic Control, Technical University of Warsaw, 245 pages, (in Polish), 1974.
  3. W. Traczyk, P. Misiurewicz, J. Kostro, M. Perkowski, A. Rydzewski, "A System for Control of Rail Traffic on the Central Railroad," Symposium on behalf of the 25th Anniversary of the School of Electronics of the Technical University of Warsaw, pp. 87 - 88, (in Polish), Warsaw, 25-27 November 1976.

    ADAPTIVE FILTERS

    • M. Perkowski, "Adaptive Frequency Domain Filters for Fourier and Walsh Transforms," Report for SHARP Microelectronics Technology, 28 pages, September, 1989.

    PARALLEL PROCESSING

    • M. Perkowski, J. Brandenburg, "Computer-Aided Interactive Design of High-Level Parallel Problem-Solving Programs," INTEL Scientific Computers, Report, 52 pages, 1986.
    • M. Perkowski, J. Brandenburg, "Two Problems Related to Mapping Graphs to Hypercubes and their Solutions on a Hypercube Computer," INTEL Scientific Computers, Report, 14 pages, 1986.
    • M. Perkowski, J. Brandenburg, "Solving Satisfiability and Petrick Functions on a Hypercube Computer," INTEL Scientific Computers, Report, 15 pages, 1986.
    • M. Perkowski, J. Brandenburg, "Solving Basic Boolean Algebra Problems on a Hypercube Computer," INTEL Scientific Computers, Report, 20 pages, 1986.
    • M. Perkowski, "Intel's Hypercube Computer as a High Level Design Engineering Workstation for Logic Design," EE Report, PSU, 187 pages, 1986.

    MOBILE ROBOTICS

    • D. Smith, K. Stanton, M. A. Perkowski, "A Distributed Processor Ensamble Methodology for the PSUBOT," Proc. of Northcon '91, pp. 310 - 315, Portland, 1-3 October 1991.
    • M. Perkowski, "Planning in Abstract Robot Spaces," Seminar on Robotics, Control Sciences and Dynamical Systems Center, University of Minnesota, June 16, 1983.
    • K. B. Stanton, P. R. Sherman, M. L. Rohwedder, Ch. P. Fleskes, D. Gray, D.T. Minh, C. Espinosa, D. Mayi, M. Ishaque, M. A. Perkowski, "PSUBOT - A Voice-Controlled Wheelchair for the Handicapped," Proc. of the 33rd Midwest Symp. on Circuits and Systems, pp. 669 - 672, Alberta, Canada, August 1990.
    • M. A. Perkowski, K. Stanton, "Robotics for the Handicapped," Proc. of Northcon '91, pp. 278 - 284, Portland, 1-3 October 1991.

IMAGE PROCESSING

  1. M. A. Perkowski, A. Sarabi, I. Schaefer, "Application of Orthogonal Transforms in Image Processing," Proc. of Northcon '91, pp. 303 - 309, Portland, 1-3 October 1991.
  2. C. Espinosa, M. A. Perkowski, "Hierarchical Hough Transform Based on Pyramidal Architecture," Proc. of Northcon '91, pp. 291 - 296, Portland, 1-3 October 1991.
  3. M. Perkowski, "Image Processing and Algorithms for the Measuring of Main Axes of the Heart from the SPECT Images," ADAC Corporation, Sunnyvale, CA, January 12, 1993.

OVULATION PREDICTION.

  1. M. Perkowski, M. Kruszynski, W. Fijalkowski, K. Kulpa, "A Multi-Parameter Microprocessor-Based Ovulation and Fertility Predictor/Indicator," Institute of Automatic Control, Technical University of Warsaw, 22 pages, 1981.
  2. M. A. Perkowski, S. Wang, W. K. Spiller, A. Legate, E. Pierzchala, "A Simple and Portable PC-based Image Processing System and its Application in Ovulometry," Proc. Imaging West 1990 Conference, pp. 758 - 763, Pasadena, CA, February 1990.
  3. M. A. Perkowski, S., Wang, W. K., Spiller, A. Legate, E. Pierzchala, "Ovulo-Computer: Application of Image Processing and Recognition to Mucus Ferning Patterns," Proc. of the Third IEEE Symposium on Computer-Based Medical Systems, pp. 52 - 59, Chapel Hill, North Carolina, June 3-6, 1990. Go to beginning.