QUESTION.

I was wondering If I should be reading some specific chapters in the books? I have been doing some reading on my own, but I didn't here you mention anything about them in class.

ANSWER.

My understanding was that you are reading both books on your own, in a preparation to the 3 projects. I think, that I explained in the first lecture my grading policy.

I am not assigning chapters to read, because everybody reads in a different speed, and in my understanding, the project is most important, because through the project I will be able to test all of the following:

(a) knowledge of VHDL

(b) its practical use and simulation skills

(c) knowledge of digital design

(d) creativity in design and hard work

In the last year the projects were a little bit simplier than this year, and I assigned reading after every lecture.

This year I gave the second project as the first one, assuming that this will give you more time to think about it and find some literature, because this year all our projects will be realized on DEC_PERLE-1 and I wanted you to do a good job.

I told you not to delay working on projects to the end, but work on them as soon as you can, on your own speed.

QUESTION.

I also wanted to know if there are some mini projects that I can do on my own.

ANSWER.

I told at the very beginning of the class, that >>yes<<, you can propose your own project. On the other hand, my experience from the past was that most of the projects proposed by students were either trivial (simple state machines, simple logic for refrigirator control,etc.) or too difficult, or too difficult to explain to other students, and therefore useless for my class.

But, I am open to your suggestions. Some of the student proposed projects we use in this class and like them. For instance, the FIR filter, the CRPD, or the Hough Transform Machine.

I suggest you follow with the current projects. They have been selected from many projects in the class that I teach since 1990 as one that teach you a lot, but are relatively simple to complete. Eeach of them have been already completed and tested, and your class is just doing improvements.

So, I do not think my projects are too difficult. As the whole, they will cover state machines, controllers, complex multilevel logic, pipelined and systolic computers, SIMD machines and more.

QUESTION.

I haven't heard you announce a midterm or anything yet. When is the first Midterm?

ANSWER.

As I told in the first lecture, there are no homeworks, no midterms, no finals. The __entire__ grade is based on the three mini-projects:

(1) simple controller (Glushkov Machine) from CU and DP, no pipelining, no parallelism (example - Fibonacci Machine, Money Change Machine, simple Petrick Machine from Class - this is project # 2 this year).

(2) pipelined, iterative or systolic circuits (example, sorter, symmetric functions realized in 2D arrays, absorber, satisfiability machine - this was project #1 this year to give you more time to read and create)

(3) complete specialized DSP or image processing computer that will include knowledge learned in (1) and (2). This year this will be - Cube Calculus Machine or Satisfiability Machine, (or something new, if it will result from your good ideas). If nothing will arise, then it will be just more versions of Cube Calculus Machine and Satisfiability Machine. Each version for a group. You keep your old groups, unless you want to separate from the group, which I do not like, but I allow.

Good circuits for sorter/absorber and satisfiability from (1) and (2) will be included in your final projects. This will perhaps require inter-group support and communication how to integrate and how to communicate. Good project reports should be written. One group already works with me to write a conference and journal paper related to their project (ask Pat Lech). The goal of these two machines is to solve Pattern Recognition problems in the last stages of real-time image processing, for instance for medical applications. One variant is to solve the exact ESOP minimization problem that nobody knows how to solve efficiently. This, if solved, is publishable in top journals such as IEEE Trans. on Computers.

It will be more on this in the class, but now my priority is to teach VHDL (first the priority was to teach basic design).

Please do not worry about your grade, my goal is to teach interesting projects using VHDL, and give students the feeling that they can do a complex digital design.

I understand that students from industry have less time than students from PSU. On the other hand they have more experience. So my grading of them is different. Everybody has chance for a good grade.

Please feel free to ask, if you have more questions.

Marek Perkowski