EE 573/673 CONTROL UNIT DESIGN (4) - Synchronous logic, Finite State Machines: and
Moore and Mealy models. Design of FSMs from regular expressions, nondeterministic
automata, Petri Nets and parallel program schemata. Partitioned control units. Cellular
automata. Realization, minimization, assignment and decomposition of FSMs. Partition and
decomposition theory and programs. Micro-programmed units. Microprogram optimization.