ENTITY and_or IS 
PORT (a,b,c: IN BIT;
         y: OUT BIT);
ATTRIBUTE pin_numbers OF and_or:ENTITY IS
     "a:2 b:3 c:4 y:19 ";
END and_or;
ARCHITECTURE rtl OF and_or IS
BEGIN
    Y <= (NOT(A) AND NOT(B) AND C) OR 
         (NOT(A) AND B AND NOT(C)) OR
         (A AND B AND C);
END rtl;