All the previously discussed methods for synchronous machines can be modified for asynchronous machines, but the requirements for asynchronous design are more difficult, the circuit should not produce hazards, races and oscillations, that can occur mostly because of different delays in gates. This means that special design tools must be built for asynchronous machines.
State minimization methods for synchronous state machines can be used without modification for asynchronous machines, but more efficient methods can be implemented for asynchronous machines, which make use of the specific forms of tables in such machines.
In assignment of asynchronous machines the race-less condition must be additionally taken into account. This constraint limits the number of applicable partitions (codes) and sometimes permits finding an optimum design for small machines faster than for synchronous machines of the same size. However, for large asynchronous machines, the problem is very complex and good algorithms are not currently available. The most advanced algorithms I am aware of permit for assignment of machines of about hundred states, but no benchmark comparison were run and results were hard to evaluate [88].
When the excitation functions are realized for asynchronous machines, the hazard must be also avoided; static hazard in asynchronous circuits is very dangerous indeed because changes not only dynamic but also static behavior of the machine. The methods of logic circuit design to avoid both static and dynamic hazard are well known and have been incorporated into some systems (see a paper by Loc Nguyen/Perkowski in this issue). However, they increase the realization by adding more gates and/or reducing number of logic levels, increasing the circuit's redundancy and therefore making it less testable.
The logic methods of races and hazard removal calculate for the worst case combination of gates' delays - some better results can be obtained when the delays of particular gates are known from layout analysis. This method is however technology dependent, and cannot be used in a technology-independent high-level system.
The algorithms for asynchronous machine design are given in [178, 157], and [140].