BOOKS
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Davio,
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Hurst,
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Karpovsky,
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Miller/Muzio.
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Mukhopahyay
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Tsutomu Sasao (ed),
Logic Synthesis and Optimization.
Kluwer Academic Publishers, Jan. 1993.
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Tsutomu Sasao and Masahiro Fujita (e.d.)
Representations of Discrete Functions
Kluwer Academic Publishers, May 1996.
Reed-Muller'95
IFIP WG 10.5 Workshop on
Applications of the Reed-Muller Expansions in Circuit Design,
Fujitsu Makuhari Systems Laboratory, Chiba City, Chiba 261, Japan. 27th -29th August, 1995.
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Shin-Ichi Minato,
Graph-based representations of discrete functions.
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Tsutomu Sasao,
Representation of logic functions using EXOR operators.
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E. M. Clarke, Z. Xudong and M. Fujita,
Application of MTBDD to spectral transformations.
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Hiroyuki Ochi,
A zero-suppressed BDD package with pruning and its application to GRM minimization.
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Martin Lobbing, Olaf Schroer and Ingo Wegener,
The theory of zero-suppressed BDDs and the number of knight's tours.
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Radomir S. Stankovic, Tsutomu Sasao and Claudio Moraga,
Spectral transforms decision diagrams.
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Fabio Somenzi,
Applications of graph based representations.
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Mario Escobar and Fabio Somenzi,
Synthesis of AND-EXOR expressions via satisfiability.
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Takashi Hirayama and Yasuaki Nishitani,
A simplification algorithm of AND-EXOR expressions for multiple-output functions.
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Norio Koda and Tsutomu Sasao,
An upper bound on the number of products in minimum ESOPs.
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Marek A. Perkowski, Timothy Ross, Dave Gadd, Jeffrey A. Goldman and Ning Song,
Application of ESOP minimization in machine learning and knowledge discovery.
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Samuel E. Aborhey,
ACEM: A minimization method for exclusive-OR sum of products expressions.
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Jonathan Saul,
An efficient data structure for the minimization of EXOR sums.
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Sarma B. K. Vrudhula, Yung-Te Lai and Massoud Pedram,
Efficient computation of the probability and Reed-Muller spectra of Boolean functions using
edge-valued binary decision diagrams.
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Jawahar Jain,
On an arithmetic transform of Boolean functions.
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Koichi Yasuoka,
Ternary decision diagrams to represent ringsum-of-products forms.
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Rolf Drechsler, Bernd Becker, and Andrea Jahnke,
On variable ordering and decomposition type choice in OKFDDs.
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Rolf Drechsler and Bernd Becker,
Dynamic minimization of OKFDDs.
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Marek A. Perkowski,
A new representation of strongly unspecified switching functions
and its application to multi-level AND/OR/EXOR synthesis.
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Tsutomu Sasao, Hiraku Hamachi, Seiji Wada and Munehiro Matsuura,
Multi-level logic synthesis based on pseudo-Kronecker decision diagrams and logical transformation.
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B. Steinbach and A. Wereszczynski,
Synthesis of multi-level circuits using EXOR-gates.
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U. Kebschull, J. Bullmann, E. Schubert and W. Rosenstiel,
Multiple domain logic synthesis.
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Tomasz Kozlowski, Erik L. Dagless and Jonathan M. Saul,
Unified decision diagrams: a representation for mixed AND-OR/EXOR combinational networks.
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Gopal Lakhani,
Minimization of switching functions for a multiple-level EXOR realization.
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Reinhard Enders,
Note on the complexity of binary moment diagram representations.
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Beate Bolling, Martin Lobbing, Martin Sauerhoff and Ingo Wegener,
Complexity theoretical aspects of OFDDs.
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Ralph Werchner, Thilo Harich, Rolf Drechsler and Bernd Becker,
Satisfiability problems for ordered functional decision diagrams.
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Tsutomu Sasao and Fumitaka Izuhara,
Exact minimization of fixed polarity Reed-Muller expressions using multi-terminal EXOR ternary decision diagram.
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Arkadij Zakrevskij,
Minimum polynominal implementation of systems of incompletely specified Boolean functions.
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Xiaoqiang Zeng, Marek A. Perkowski and Andisheh Sarabi,
Approximate minimization of generalized Reed-Muller forms.
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Xiaoqiang Zeng, Haomin Wu, Marek A. Perkowski and Andisheh Sarabi,
A new efficient algorithm for finding exact minimal generalized partially-mixed-polarity Reed-Muller expansion.
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Bernd Becker and Rolf Drechsler,
Exact minimization of Kronecker expressions for symmetric functions.
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Debatosh Debnath and Tsutomu Sasao,
GRMIN: A heuristic minimization algorithm for generalized Reed-Muller expression.
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Valery P. Suprun,
Fixed polarity Reed-Muller expressions of symmetric Boolean functions.
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Bogdan J. Falkowski and Susanto Rahardja,
Quasi-arithmetic polynomial expansions for quaternary functions.
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Bogdan J. Falkowski and Susanto Rahardja,
Family of fast transforms for GF(2) orthogonal logic.
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Marek A. Perkowski, Andisheh Sarabi, and F. Rudolf Beyl,
New families of universal additive canonical forms of switching functions.
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S. N. Yanushkevich,
Arithmetical canonical expansion of Boolean functions as generalized Reed-Muller series.
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M. A. Thornton and V. S. Nair,
Fast Reed-Muller spectrum computation using output probabilities.
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Masami Nakajima, Michitaka Kameyama,
Design of highly parallel circuits using EXOR gates for symmetrical logic operations.
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Poh Yong Koh and Kiyoshi Furuya,
State diagrams of elementary cellular automata with arbitrary boundary conditions.
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Roustam Kh. Latypov,
Self-testable circuits with single fault detection.
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M. Riege and W. Anheier,
Online self-checking FPGA structures based on Reed-Muller networks.
3rd International Workshop on Applications of the Reed-Muller Expansion in Circuit Design
(Reed-Muller 97) In Cooperation with IFIP WG 10.5.
Oxford University, Oxford, UK.
September 19-20, 1997.
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Masahiro Fujita,
Hybrid Spectral Transform Diagrams. Invited talk.
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Andreas Hett, Rolf Drechsler and Bernd Becker,
Reordering Based Synthesis.
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Gueesang Lee,
ETDD-based Generation of Complex Terms for Incompletely Specified Boolean Functions.
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M Marek-Sadowska, G Guner, T Krishnamurthy, S Gargeshwari and Ch Sharma,
Minimized Generalized Partially Mixed Polarity Reed-Muller Expansion.
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Debatosh Debnath and Tsutomu Sasao,
Exclusive-OR of Two Sum-of Products Expressions: Simplification and an
Upper Bound on the Number of Products.
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N. Song and M.A. Perkowski,
``New Fast Approach to Approximate ESOP Minimization for
Incompletely Specified Multi-Output Boolean Functions,''
pp. 61- 72.
postscript.
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Yibin Ye, Kaushik Roy and Rolf Drechsler,
Low Power Aspects of XOR based Circuit Design.
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Marek Perkowski, Malgorzata Chrzanowska-Jeske and Yang Xu,
``Lattice Diagrams Using Reed-Muller Logic,''
pp. 85 - 102.
postscript of this paper
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Jonathan Saul,
Hardware Acceleration of Two-level ESOP Minimization Using CAMs.
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Marek Perkowski, Lech Jozwiak and Rolf Drechsler,
``New Hierarchies of AND/EXOR Trees, Decision Diagrams,
Lattice Diagrams, Canonical Forms, and Regular Layouts''.
Proc. RM'97 Conference,
Oxford Univ., U.K., Sept. 1997, pp. 115 - 132.
postscript of the paper.
slides of the presentation.
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D. Das, S. Chakraborty and B. Bhattacharya,
Universal and Robust Testing of Stuck-Open Faults in Reed-Muller Canonical CMOS Circuits.
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Radomir Stankovic,
Non-Abelian Groups in Optimization of Decision Diagrams Representations of Discrete Functions. Poster.
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Radomir Stankovic and Yasushi Endow,
Reed-Muller Transform and Wavelets Theory: An Alternative Look at
Reed-Muller Expansions. Poster.
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A. Bystrov and A. Almaini,
Test Set Generation for Functional Decision Diagram Circuits using Genetic Algorithm. Poster.
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Bernd Steinbach and Christian Lang,
A General Data Structure for XOR-Decomposition of Sets of Switching Functions. Poster.
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Roustam Latypov,
Compact Testing of AND-EXOR Programmable Logic Arrays. Poster.
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Tsutomu Sasao,
Complexity Measures for AND-EXOR Expressions.
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Arkadij Zakrevskij,
Minimizing Polynomial Implementation of Weakly Specified Logic Functions and Systems.
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Julia Manstivoda and Nikolay Peryazev,
The Complexity of Symmetric Functions in the Polynomial Forms.
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Christoph Meinel and Harald Sack,
Case Study: Manipulating EXOR-OBDDs by Means of Signatures.
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Stefan Horeth and Rolf Drechsler,
Compilation of Fast Manipulation Algorithms for K*BMDs.
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Henrik Hulgaard, Poul Williams and Henrik Andersen,
Combinational Logic-Level Verification using Boolean Expression Diagrams.
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Elena Dubrova, Michael Miller and Jon Muzio,
A Heuristic Procedure for Finding AND-OR-XOR Expansions of Incompletely Specified Boolean Functions.
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Marek Perkowski, Lech Jozwiak and Rolf Drechsler,
``A Canonical AND/EXOR
Form that Includes Both the Generalized Reed-Muller Forms and Kronecker
Reed-Muller Forms'',
pp. 219 - 233.
postscript.
postscript of paper, another version.
slides of presentation
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Paul Metzgen and Jonathan Saul,
A Critique of Mixed Exclusive-/Inclusive-OR Logic Synthesis for the Xilinx XC6200 FPGA.
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Karen Dill, Konika Ganguly, Robert Safranek and Marek Perkowski,
``A New Zhegalkin Galois Logic,''
pp. 247 - 257.
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Radomir Stankovic,
Decision Diagrams for Discrete Functions Representations. Poster.
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Ken Fok, Malgorzata Marek-Sadowska and Simone Boehringer,
On Self-dual Complements of Fixed Polarity Reed-Muller 2-forms. Poster.
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Karen Dill and Marek Perkowski,
Evolutionary Minimization of Generalized Reed-Muller Forms. Poster.
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Elena Zaitseva and D. Popel,
Decomposition of Logical Functions in Reed-Muller Logic. Poster.
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Svetlana Yanushkevich, Grzegorz Holowinski, Vlad Shmerko and Elena Zaitseva,
Parallel and Distributed Algorithms for Minimization of Incompletely
Specified Logic Functions in Reed-Muller Domain. Poster.
Last Update of this: November 18, 1997.