ECE171: Introduction to Digital Circuits

Fall 1999

Rev: 12.3.99

CYPRESS WARP2 VHDL TUTORIAL

INTRODUCTION

This tutorial shows how the Cypress Semiconductor Warp2 compiler can be used to develop the fusemap(.jed) file for a combinational logic design described in VHDL. It also shows how to simulate the design and generate test vectors using the Cypress Nova simulator.

FIRST TIME STARTUP:

Before you can use the Warp2 tools the first time, you have to do an addpkg operation. Type the command addpkg and press the Return key. When the pkg list pops up find the entry for Warp2 and remember the number for it. Scroll to the bottom of the list and at the prompt, enter the number for warp2 and press the Return key. Logout and then login again to implement the addpkg operation.

USING WARP2 TO DEVELOP A .JED FILE

1. At the unix prompt type galaxy and press the Return key.
2. When the Galaxy window appears, put the cursor on the File entry at the top and hold down the right mouse key to see the commands in the File menu. While still holding down the right mouse key, move the cursor to the right to see the commands in the other menus.
3. Move the cursor back to the File menu and down to the Open entry, then click the left mouse key.
4. When the Warp VHDL Files window, read through it and then click on the Edit button. After a pause, the Text editor window should appear.
5. In the Text Editor window, type in the example file below exactly as shown on the next page.

   ENTITY and_or IS PORT (a,b,c: IN BIT; y: OUT BIT); ATTRIBUTE pin_numbers OF and_or:ENTITY IS "a:2 b:3 c:4 y:19 "; END and_or; ARCHITECTURE rtl OF and_or IS BEGIN Y <= (NOT(A) AND NOT(B) AND C) OR (NOT(A) AND B AND NOT(C)) OR (A AND B AND C); END rtl;

    

6. After carefully checking the design, pop up the File menu and click on Store as New File. When the Text:Store form pops up, enter andor.vhd as the File and click on the Store as New File button.
7. Click on the Small triangle in the upper left corner of the Text Editor window to iconify it for future reference.
8. In the Warp VHDL Files form, click on cancel to go back to the main form. Then pop up the Files menu and click on Open to bring up the Warp VHDL files form again. The andor.vhd file should now be present in the VHDL Files list on the left
9. Click on the andor.vhd entry to select it, then click on the Add>> button to put the file on the Warp Input Files list.
10. Click on the Options button. In the form that appears, click on the C16V8 entry in the Devices list, then click on OK.
11. Back in the Warp VHDL Files form again, click on the andor.vhd entry in the Warp Input Files list to select it, click on Compile and Synthesize, then click on OK. In response to this command, the main Galaxy window should reappear and show a list of the optimization and device fitting steps. The output of this step is a fusemap(.jed) file. your next steps are to simulate the .jed file to determine if it is correct and generate some test vectors that could be used to determine if an actual device were programmed correctly.

SIMULATING THE .JED FILE WITH THE NOVA SIMULATOR

1. In the Galaxy window, pop up the Tools menu and click on Nova Functional Simulator.
2. In the Nova window, put the cursor on the File entry, hold down the right mouse key, and move the mouse to the right to see the commands available in the various menus. After you read the menus, move back to the File menu and click on Open.
3. In the form that appears, click on andor.jed to select it, then click on Open. The signal names for your design should appear in the column at the left of the Nova window.
4. The next step is to apply a binary count sequence to the a, b, and c inputs of your design. Let's assume that a is the most significant bit and c is the least significant bit. Click on c to select it, then pop up the Edit menu and click on Clock. When the Clock form appears, enter 10 as the period. (The period is in nano-seconds). To move to a particular entry in a form, move the cursor to that entry and click the left mouse key. Move to the Time High box and enter 5 as the time high. Then click on Start low and click on OK.
5. Click on b to select that signal, pop up the Edit menu and click on Clock. In the clock form enter 20 as the period, enter 10 as the clock high time, click on Start Low, and click on OK.
6. Click on a to select it, pop up the Edit menu and click on Clock. In the Clock form enter 40 as the clock period, enter 20 as the clock high time, click on Start Low, and click on OK.
7. If the stimulus waveforms are correct, pop up the Simulate menu and click on Execute. The Y output waveform should now also be visible on the screen.
8. Write a truth table for the Y equation and determine if the output waveform is correct.
9. If the y output is correct, the next step is to use the waveform data create test vectors and add them to the end of the .jed file. Pop up the Nova File menu and click on Write JEDEC Vectors.
10. It is often useful to save to Stimulus file so that if you have to simulate the design again, you don't have to recreate the stimulus signals. To do this, pop up the Nova File menu and click on Write Sim.
11. Also, it is useful to save the trace data so you can print it out in truth table form. To do this, pop up the File menu and click on Write Trace.
12. The next step is to shut everything down. Pop up the Nova File menu and click on Exit. Put the cursor on the Text Editor icon, press the right mouse key to pop up the menu there, and click on Quit. Finally, pop up the Galaxy File menu and click on Exit. This should bring you back to the unix prompt.
13. To print any desired files, you can use the lw10 printer in the FAB SUN lab or the lw7 printer in the FAB CIRCUITS lab with a command of the form:

    enscript -Plw7 filename
    enscript -2r -Plw10 filename

    the second command will print 2 pages of information on one sheet.