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Ph.D. Student |
Kecheng received his bachelor’s and master’s degrees from Department of Electronic Engineering, Harbin Institute of Technology, Harbin, China, in 2004 and 2006, respectively. Now he is pursuing his Ph.D degree in the System Verification Lab (SVL) with Prof. Fei Xie, in Department of Computer Science, the Portland State University.
Kecheng’s Curriculum Vitae is available here (PDF).
Formal Verification for High-Assurance Behavioral Synthesis
Component-Based Hardware/Software Co-Design and Co-Simulation
Kecheng Hao, Fei Xie, Sandip Ray, and Jin Yang. Optimizing Equivalence Checking for Behavioral Synthesis. To appear in Proceedings of Design, Automation and Test in Europe (DATE), 2010.
Sandip Ray, Kecheng Hao, Yan Chen, Fei Xie, and Jin Yang. Formal Verification for High-Assurance Behavioral Synthesis. In Proceedings of the 7th International Symposium on Automated Technology for Verification and Analysis (ATVA), 2009.
Kecheng Hao and Fei Xie. Componentizing Hardware/Software Interface Design. In Proceedings of Design, Automation and Test in Europe (DATE), 2009.
Ping Hang Cheung, Kecheng Hao, and Fei Xie. Component-Based Hardware/Software Co-Simulation . In Proceedings of 10th EUROMICRO Conference on Digital System Design (DSD): Architectures, Methods and Tools, 2007.
"Formal Verification for High-Assurance Behavioral Synthesis". the 7th International Symposium on Automated Technology for Verification and Analysis (ATVA), Macau, China. Oct, 2009
"Formal Verification for High-Assurance Behavioral Synthesis". Progress report to Strategic CAD Lab at Intel, Portland, Oregon. Oct, 2009
"Componentizing Hardware/Software Interface Design". Design, Automation and Test in Europe (DATE), Nice, France. April, 2009