Department of Electrical and Computer Engineering
IC Design and Test Laboratory
Portland State University
P.O. Box 751
Portland, OR 97207-0751
Dr. Shirley is a Research Professor with the Integrated Circuit Design and Test Laboratory in the ECE department at Portland State University (Oregon). He retired in 2007 after 23 years at Intel, and a prior 10 years at Motorola, U.S. Steel and Carnegie-Mellon University (post-doc). At Intel Dr. Shirley worked and published on package reliability, moisture reliability of silicon, accelerated moisture test hardware (HAST), and industry standards. He also led the development of Intel’s burn-in methodology, founded a manufacturing test technology development Q&R group, and started a Q&R statistical modeling group. Subsequently he co-directed, as Intel’s Q&R Systems Architect, a department responsible for Intel’s quality systems. Dr. Shirley’s current interests include yield/quality/reliability statistical modeling of manufacturing test. Dr. Shirley holds a PhD in Physics from Arizona State University, and an MSc in Physics from the University of Melbourne (Australia).