All technical sessions are held in Smith Memorial Center Vanport room (Rm 338).(please note that the program and the rooms have been updated as of Aug. 6)

Sunday, August 11, 1996

13:00 - 17:00 Tutorials
18:00 - 20:00 Reception in Browsing Lounge (Rm 238)

Monday August 12, 1996

07:30 - 08:30 Breakfast Vanport Room (Rm 338)
08:30 - 10:15 Session M.1
10:15 - 10:45 Coffee break
10:45 - 12:00 Session M.2
12:00 - 13:30 Lunch
13:30 - 15:15 Session M.3
15:15 - 15:45 Coffee break
15:45 - 17:00 Session M.4
17:00 - 19:00 Dinner
19:00 - 21:00 Rap session

Tuesday August 13, 1996

07:30 - 08:30 Breakfast Vanport Room (Rm 338)
08:30 - 10:15 Session T.1
10:15 - 10:45 Coffee break
10:45 - 12:00 Session T.2
12:00 - 14:00 Lunch
14:00 - 17:00 Demos and Exhibits
17:00 - 18:30 Free time
18:30 - 21:00 Banquet Meet at Riverplace at 18:30

Wednesday August 14, 1996

07:30 - 08:30 Breakfast Vanport Room (Rm 338)
08:30 - 10:15 Session W.1
10:15 - 10:45 Coffee break
10:45 - 12:00 Session W.2

13:00 - 17:00 Tutorials

1. ``VHDL-A - Analog Extensions to VHDL,'' Ernst Christen, Analogy, Inc., Beaverton, OR, USA, Co-chair of IEEE DASC 1076.1 Working Group on Analog and Mixed-Signal Extensions to VHDL.

2. ``XSPICE - Behavioral Modeling Extensions to SPICE,'' Fred Cox, Georgia Tech Research Institute, Atlanta.

3. ``Design and Simulation of High-Frequency Power Transformers,'' Dr. Horst Grotstollen, University of Paderborn, Germany.

Monday August 12, 1996

8:30 - 10:15 Section M.1: Simulation Tools

1. Invited paper: ``Comparing SPICE With Other Circuit-Simulation Tools for Power-Electronics Analysis,'' V.J. Thouttuvelil, Bell Labs, Lucent Technologies, Mesquite, TX, USA.

2. ``PETS - A Simulation Tool for Power Electronics,'' P. Pejovic and D. Maksimovic, University of Colorado, Boulder, CO, USA.

3. ``Analysis of Networks with Ideal Switches,'' J. Vlach, University of Waterloo, Waterloo, Ontario, Canada

Coffee break 10:15 - 10:45

10:45 - 12:00 Section M.2: Power Electronic System Modeling

1. ``On the Efficacy of Sampled Data Modeling of Switched Networks,'' R. Tymerski, Portland State University, Portland, OR, USA.

2. ``A Transient Behavioral Model (TBM) for Power Converters,'' R. Kagalwala, S.S. Venkata, P.O Lauritzen, University of Washington, Seattle, WA, USA, A. Sundaram and R. Adapa, Electric Power Research Institute, Palo Alto, CA, USA.

3. ``Computer Analysis of a Power Electronic System with Analog/Digital Mixed Elements,'' T. Kato and S. Fujimoto, Doshisha University, Kyoto, Japan.

Lunch 12:00 - 13:30

13:30 - 15:15 Section M.3: Design And Synthesis

1. ``Accelerators and Convergence Measures for Monte-Carlo Synthesis Techniques,'' K. Sridhar, Bell Labs, Lucent Technologies, Mesquite, TX, USA.

2. ``Simultaneous Design of Power Stage and Controller for Switching Power Supplies,'' C. Gezgin, B.S. Heck and R.M. Bass, Georgia Institute of Technology, Atlanta, GA, USA.

3. ``Power Electronic Circuit Reliability Analysis Incorporating Parallel Simulations,'' L.A. Kamas and S.R. Sanders, University of California at Berkeley, Berkeley, CA, USA.

4. ``A Design Methodology for Power Electronics,'' L.E. Amaya, P.T. Krein and F.N. Najm, University of Illinois at Urbana-Champaign, Urbana, IL, USA.

5. ``A Comparison of Multirate Digital Compensators for a Battery Charger,'' D.K. Jackson, S.B. Leeb, A.M. Schultz, A. Mitwalli, Massachusetts Institute of Technology, Cambridge, MA, USA.

Coffee break 15:15 - 15:45

15:45 - 17:00 Section M.4: Simulation Methods

1. ``A Computer Method for Finding Operating-Mode Boundaries in Power Electronic Circuits by Curve Tracing,'' Y. Kuroe and T. Kato, Kyoto Institute of Technology, Kyoto, Japan.

2. ``Automatability of Consistent Switches States Search in Computer Aided Analysis of Switched RLC Networks,'' N. Femia, Universita' di Salerno, Italy.

3. ``Periodic Steady-State Analysis of an Autonomous Power Electronic System by a Modified Shooting Method,'' T. Kato and W. Tachibana, Doshisha University, Kyoto, Japan.

Dinner break 17:00 - 19:00

19:00 - 21:00 Rap session: Benchmarks

Organizer and chairman: Peter Lauritzen, University of Washington, Seattle, WA, USA.

Panelists: J.A. Barby, University of Waterloo, Ontario, Canada, P. Krein, University of Illinois at Urbana-Champaign, Urbana, IL, USA, V. Rajagopalan, UQTR, Québec, Canada, V.J. Thouttuvelil, Bell Labs, Lucent Technologies, Mesquite, TX, USA.

Tuesday August 13, 1996

8:30 - 10:15 Section T.1: Simulation and Uncertainty Modeling of Converters

1. ``Analysis and Simulation of Digitally Controlled Grid-Connected PWM-Converters using the Space-Vector Average Approximation,'' Michael Lindgren, Chalmers University of Technology, Göteborg, Sweden.

2. ``Simulation Studies of A Resonant Link Converter,'' S. Chickamenahalli, Wayne State University, Detroit, MI, USA.

3. ``Identification of DC-DC Switching Converters Characteristics For Control System Design Using Interval Mathematics,'' A.Cirillo, N. Femia and G. Spagnuolo, Universita' di Salerno, Italy.

4. ``Generalized Formulation of Perturbation Matrices for Robust Stability Analysis of Switching Regulators,'' Z. Wang and R. Tymerski, Portland State University, Portland, OR, USA.

5. ``Application of Frequency-Selective Averaging to Closed-Loop Simulation of DC-DC Converters,'' V.A. Caliskan, G.C. Verghese Massachusetts Institute of Technology, Cambridge, MA, USA, and A.M. Stankovic, Northeastern University, Boston, MA, USA.

Coffee break 10:15 - 10:45

10:45 - 12:00 Section T.2: Power Semiconductor Devices

1. ``Modeling of Power Semiconductor Devices: Problems, Limitations and Future Trends,'' B. Fatemizadeh, P. O. Lauritzen, University of Washington, Seattle, WA, USA, and D. Silber, University of Bremen, Bremen, Germany.

2. ``Role of Parasitic BJT in the Design of Power D-MOSFET,'' B. Pejcinovic, H. Brech and M. Persun, Portland State University, Portland, OR, USA.

3. ``An Analytical Model of Power Bipolar Transistor for Circuit Simulation,'' B. Fatemizadeh and P.O. Lauritzen, University of Washington, Seattle, WA, USA.

4. ``Analyzing Power MOSFET Breakdown Voltage Using Simulators,'' M. Chrzanowska-Jeske, Portland State University, Portland, OR, USA.

Lunch 12:00 - 14:00

14:00 - 17:00 Software Demos and Exhibition

Wednesday August 14, 1996

8:30 - 10:15 Section W.1: High Power Systems

1. ``Modelling and Implementation of Space Vector PWM Techniques in Active Filter Applications,'' J.R. Espinoza, G. Joos, Concordia University, Montreal, Quebec, Canada, and H. Jin, University of British Columbia, Vancouver, B.C., Canada.

2. ``Analysis by Finite Element Method of a Coupled Inductor Circuit Used as Current Injection Interface,'' J. Xu, A. Lakhsasi, Z. Yao and V. Rajagopalan, CPEE: Hydro-Quebec - CRSNG, Université du Québec á Trois-Riviéres, Québec, Canada.

3. ``On-Line Computation of Tj for EV Battery Chargers,'' B.J. Masserant and T.A. Stuart, University of Toledo, Toledo, OH, USA.

4. ``Simulation of A Power Angle Controlled Voltage Source Inverter Using a Linear Quadratic Method in a Wind Energy Application,'' J. Svensson, Chalmers University of Technology, Göteborg, Sweden.

Coffee break 10:15 - 10:45

10:45 - 12:00 Section W.2: Electrical Motors

1. ``Modeling and Simulation of Saturated Induction Motors,'' A. Charette, LTEE, Hydro-Québec, Shawinigan, Z. Yao, A. Lakhsasi and V. Rajagopalan, CPEE Hydro-Québec - CRSNG, UQTR, Québec, Canada.

2. ``Simulation of Distribution Feeders and Charger Installation for the Olympic Electric Tram Systems,'' D. Handran, D. Bass, Georgia Institute of Technology, Atlanta, GA, USA, and J. Kennedy, Georgia Power Company, GA, USA.

3. ``A General-Purpose Driver for Spindle Motors in Rigid Disk Drive Applications,'' A. Balakrishnan, Quantum Corporation, Milpitas, CA, USA.

Workshop ends.

The site of the workshop is Smith Memorial Center on the campus of PSU, which is in downtown Portland. The enclosed maps show the downtown area, PSU campus and approaches to PSU. From Portland International Airport you can: 1) take the RAZ-Transportation shuttle bus for $7 each way; the service leaves every half hour, 2) take a Tri-Met bus (Portland mass transit) number 12 to PSU, or 3) use taxi service. For participants staying at the Red Lion Inn a free shuttle service is provided by the Inn. Alternatively, coming by car from the airport take Airport Way to I-205 South, then I-84 West which takes you to I-5 South. Stay in the left lanes of I-5 which takes you over the Marquam bridge and on to I-405. Immediately after the bridge take either the 4th Ave or 6th Ave exits, or even the 12th Ave exit. PSU is a short distance away from the exits. For details see maps on the reverse of the PSU campus map.

Those participants using on-campus housing will be staying at the Ondine, which is located on 6th Ave between College and Hall Streets. Check-in time is between 2 PM and 7 PM, and check-out time is 11 AM.

The banquet will be held on Tuesday, August 13 on a river boat cruising the Willamette river. The boarding time is 18:30 at Riverplace on the riverfront between Marquam and Hawthorne bridges (see map).