Visual Software - LOTUS
A System for Synthesis of Regular Layout
Abstract
The input of LOTUS is a multi-output combinational logic function with
don’t-cares. The output is the regular layout in the form of a Shannon
Lattice [1], Reed-Muller Lattice [2], or Linearly-Independent Lattice [3].
The user can choose among a variety of lattice types described in the literature
and in our forthcoming publications.
References
[1] M. Chrzanowska-Jeske, Y. Xu, M. Perkowski. Logic Synthesis for
a Regular Layout. Accepted to VLSI Design: An International Journal
of Custom-Chip Design, Simulation, and Testing.
[2] M. Perkowski, M. Chrzanowska-Jeske, and Y. Xu. Lattice
Diagrams Using Reed-Muller Logic. Proc. of RM '97,
Oxford Univ., U.K., Sept. 1997, pp. 85 - 102.
[3] M. Perkowski, L. Jozwiak, R. Drechsler, and B. Falkowski.
Ordered
and Shared, Linearly Independent, Variable-Pair Decision Diagrams.
Proc.
of 1st Intl. Conf. on Information, Communications and Signal Processing
(ICICS'97), Singapur, 9-12 Sept. 1997.
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This webpage is supported by Alan Mishchenko.