Advanced Computer Architecture II

Instructor: Alaa R. Alameldeen

Fall 2009: MW 7:00-8:50 PM, CAP 1315

What's New?

18-Oct: Homework 2: deadline postponed to Oct 26
12-Oct: Project ideas and guidelines posted
6-Oct: Homework 2 posted
27-Sep: Class description notes posted
17-Sep: Tentative class schedule posted

Class Information

Date and Time: Mondays and Wednesdays 7:00 PM - 8:50 PM
Place: CAP 1315
Office Hours: Monday and Wednesday after class, or by appointment

Tentative Class Schedule

Week	Day	Date	Topic	Readings (before class)	Homework/Project	Class Notes
1	Mon	28-Sep	Introduction, Parallel Computing Overview		HW1 Out	slides , six-per-page
1	Wed	30-Sep	Introduction to Parallel Computing	Introduction to Parallel Computing (Read)		slides , six-per-page
2	Mon	5-Oct	Chip Multiprocessors (Multicore Processors)	Olukotun et al., ASPLOS 1996 (Review)	HW1 Due	slides , six-per-page
2	Wed	7-Oct	Hyperthreading & Multiprocessor Performance	Marr et al., ITJ 2001 (Review), Alameldeen&Wood, IEEE Micro 2006 (Read)	HW2 Out	slides , six-per-page
3	Mon	12-Oct	Shared Memory Multiprocessors	Gehringer et al., ACM CAN 1988 (Skim), Duncan, IEEE Computer 1990 (Skim)		slides , six-per-page
3	Wed	14-Oct	Cache Coherence Protocols	Stenstrom, IEEE Computer 1990 (Review)	Project Proposals Due	slides , six-per-page
4	Mon	19-Oct	Directory-based Cache Coherence	Lenoski et al., ISCA 1990 (Review), Laudon&Lenoski, ISCA 1997 (Read)	Project Out	slides , six-per-page
4	Wed	21-Oct	Message Passing	Seitz, CACM 1985 (Review)		slides , six-per-page, LLNL MPI Tutorial
5	Mon	26-Oct	Cache Only Memory Architectures	Hagersten et al., IEEE Computer 1992 (Review), Falsafi&Wood, ISCA 1997 (Skim)	HW2 Due	slides , six-per-page
5	Wed	28-Oct	Memory Consistency Models	Adve&Gharachorloo, Rice TR, 1995 (Review)		slides , six-per-page
6	Mon	2-Nov	Midterm Exam (In Class)
6	Wed	4-Nov	Interconnect and Routing	Ni&McKinley, IEEE Computer, 1993 (Review)		slides , six-per-page
7	Mon	9-Nov	Cray 1 and Cray T3E Architectures	Russell, CACM 1978 (Read), Scott, ASPLOS 1996 (Read)		slides , six-per-page
7	Wed	11-Nov	Holiday - No Class
8	Mon	16-Nov	IBM Power 4 and Power 5 Architectures	Tendler et al., IBM J. R&D, 2002 (Review), Sinharoy et al., IBM J. R&D, 2005 (Skim)	Project Progress Report Due	slides , six-per-page
8	Wed	18-Nov	Spin-lock Alternatives	Mellor-Crummey&Scott, ACM TOCS, 1991 (Review), Anderson, IEEE TPDS, 1990 (Skim), Rajwar&Goodman, Micro, 2001 (Skim)		slides , six-per-page
9	Mon	23-Nov	Transactional Memory	Herlihy&Moss, ISCA 1993 (Read), Moore et al., HPCA 2006 (Skim)		slides , six-per-page
9	Wed	25-Nov	Dataflow Architectures	Veen, ACM Computing Surveys 1986 (Read), Papadopoulos, ISCA 1990 (Read)		slides , six-per-page
10	Mon	30-Nov	Examples for Research Multiprocessors	Sankaralingam et al., ISCA 2003 (Skim), Swanson et al., Micro 2003 (Skim), Taylor et al., IEEE Micro 2002 (Skim), Khailany et al., IEEE Micro 2001 (Skim)		slides , six-per-page, TRIPS talk from project website, RAW talk in Hotchips 2001
10	Wed	2-Dec	Project Presentations		Project Due
10	Fri	4-Dec	Final Exam (In class, CAP 1315, 7-8:30 PM)
12	Mon	14-Dec	No Class		Grades Out

Homeworks and Projects

Review Guidelines: Paper review guidelines and submission instructions.
Homework 1: Due Oct 5.
Homework 2: Due Oct 26. Submission Instructions.
Project guidelines and ideas: Due Dec 2. Note: You need a user name (your last name in lowercase) and a password (the first six digits of your PSU ID) to access project information.
Guidelines on running long simulation jobs

Exams and Grades

Reading List

(Please Respect the IEEE and ACM Copyrights)

Introduction to Parallel Computing, Lawrence Livermore National Laboratory Tutorial.
Kunle Olukotun et al., "The Case for a Single-Chip Multiprocessor," ASPLOS 1996.
Deborah T. Marr et al., "Hyper-Threading Technology Architecture and Microarchitecture," Intel Technology Journal, 2001.
Alaa Alameldeen and David Wood, "IPC Considered Harmful for Microprocessor Workloads," IEEE Micro, 2006.
Edward Gehringer et al., "A Survey of Commercial Parallel Processors," ACM Computer Architecture News, 1988.
Ralph Duncan, "A Survey of Parallel Computer Architectures," IEEE Computer, 1990.
Per Stenstrom, "A Survey of Cache Coherence Schemes for Multiprocessors," IEEE Computer, 1990.
Daniel Lenoski et al., "The Directory-based Cache Coherence Protocol for the DASH Multiprocessor," ISCA 1990.
James Laudon and Daniel Lenoski, "The SGI Origin: A ccNUMA Highly Scalable Server," ISCA 1997.
Charles Seitz, "The Cosmic Cube," CACM 1985.
Lawrence Livermore Natianal Lab MPI Tutorial.
Erik Hagersten et al., "DDM - A Cache-Only Memory Architecture," IEEE Computer, 1992.
Babak Falsafi and David Wood, "Reactive NUMA: A Design for Unifying S-COMA and CC-NUMA," ISCA 1997.
Sarita Adve and Kourosh Gharachorloo, "Shared Memory Consistency Models: A Tutorial," Rice University Tech. Report, 1995.
Lionel Ni and Philip McKinley, "A Survey of Wormhole Routing Techniques in Direct Networks," IEEE Computer, 1993.
Richard Russell, "The CRAY-1 Computer System," Communications of the ACM, 1978.
Steven Scott, "Synchronization and Communication in the T3E Multiprocessor," ASPLOS, 1996.
J. Tendler et al., "Power4 System Microarchitecture," IBM Journal of Research and Development, 2002.
B. Sinharoy et al., "Power5 System Microarchitecture," IBM Journal of Research and Development, 2005.
Thomas Anderson, "The Performance of Spin-Lock Alternatives," IEEE Trans. Parallel and Distributed Systems, 1990.
John Mellor-Crummey and Michael Scott, "Synchronization Without Contention," ACM Trans. Computer Systems, 1991.
Ravi Rajwar and James Goodman, "Speculative Lock Elision: Enabling Highly-Concurrent Multithreaded Execution," MICRO, 2001.
Maurice Herlihy and Eliot Moss, "Transactional Memory: Architectural Support for Lock-Free Data Structures," ISCA, 1993.
Kevin Moore et al., "LogTM: Log-based Transactional Memory," HPCA, 2006.
Arthur Veen, "Dataflow Machine Architecture," ACM Computing Surveys, 1986.
Gregory Papadopoulos and David Culler, "Monsoon: An Explicit Token-Store Architecture," ISCA, 1990.
Karthikeyan Sankaralingam et al., "Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture," ISCA, 2003.
Steven Swanson et al., "Wavescalar," MICRO, 2003.
Michael Taylor et al., "The Raw Microprocessor: A Computational Fabric for Software Circuits and General Purpose Programs," IEEE Micro, 2002.
Brucek Khailany et al., "Imagine: Media Processing with Streams," IEEE Micro, 2001.

Useful Links

Previous ECE 588/688 offering, Winter 2009
Previous ECE 587/687 offering, Spring 2009
Previous ECE 588/688 offering from Dr. Haitham Akkary, Winter 2008
WWW Computer Architecture Webpage
Writer's Handbook: Writing guidelines from the University of Wisconsin-Madison's Writing Center.
Oral Presentation Advice from Prof. Mark Hill

Last Modified Mon Oct 12 00:11:37 PDT 2009 by Alaa R. Alameldeen