Advanced Computer Architecture II

Instructor: Alaa R. Alameldeen

Winter 2009: MW 7:00-8:50 PM, CAP 1306

What's New?

23-Mar: Final Grades posted
08-Mar: Project submission instructions posted
16-Feb: Midterm grades posted
21-Jan: Project ideas and instructions posted
14-Jan: Homework 2 posted
04-Jan: Class description notes posted

Class Information

Date and Time: Mondays and Wednesdays 7:00 PM - 8:50 PM
Place: CAP 1306
Office Hours: Monday and Wednesday after class, or by appointment

Tentative Class Schedule

Week	Day	Date	Topic	Readings (before class)	Homework/Project	Class Notes
1	Mon	5-Jan	Introduction, Parallel Computing Overview		HW1 Out	slides , six-per-page
1	Wed	7-Jan	Introduction to Parallel Computing	Introduction to Parallel Computing (Read)		slides , six-per-page
2	Mon	12-Jan	Chip Multiprocessors (Multicore Processors)	Olukotun et al., ASPLOS 1996 (Review)	HW1 Due	slides , six-per-page , Online CMP Resources
2	Wed	14-Jan	Hyperthreading & Multiprocessor Performance	Marr et al., ITJ 2001 (Review), Alameldeen&Wood, IEEE Micro 2006 (Read)	HW2 Out	slides , six-per-page , Online Hyperthreading Resources
3	Mon	19-Jan	Holiday - No Class
3	Wed	21-Jan	Shared Memory Multiprocessors	Gehringer et al., ACM CAN 1988 (Review)		slides , six-per-page
4	Mon	26-Jan	Cache Coherence Protocols	Stenstrom, IEEE Computer 1990 (Review)	Project Proposals Due	slides , six-per-page
4	Wed	28-Jan	Directory-based Cache Coherence	Lenoski et al., ISCA 1990 (Review), Laudon&Lenoski, ISCA 1997 (Read)	Project Out	slides , six-per-page
5	Mon	2-Feb	Message Passing	Seitz, CACM 1985 (Review)	HW2 Due	slides , six-per-page , LLNL MPI Tutorial
5	Wed	4-Feb	Cache Only Memory Architectures	Hagersten et al., IEEE Computer 1992 (Review), Falsafi&Wood, ISCA 1997 (Skim)		slides , six-per-page
6	Mon	9-Feb	Midterm Exam (In Class)
6	Wed	11-Feb	Memory Consistency Models	Adve&Gharachorloo, Rice TR, 1995 (Review)		slides , six-per-page
7	Mon	16-Feb	Interconnect and Routing	Ni&McKinley, IEEE Computer, 1993 (Review)		slides , six-per-page
7	Wed	18-Feb	Cray 1 and Cray T3E Architectures	Russell, CACM 1978 (Read), Scott, ASPLOS 1996 (Read)		slides , six-per-page
8	Mon	23-Feb	IBM Power 4 and Power 5 Architectures	Tendler et al., IBM J. R&D, 2002 (Review), Sinharoy et al., IBM J. R&D, 2005 (Skim)	Project Progress Report Due	slides , six-per-page
8	Wed	25-Feb	Spin-lock Alternatives	Mellor-Crummey&Scott, ACM TOCS, 1991 (Read), Anderson, IEEE TPDS, 1990 (Skim), Rajwar&Goodman, Micro, 2001 (Skim)		slides , six-per-page
9	Mon	2-Mar	Transactional Memory	Herlihy&Moss, ISCA 1993 (Read), Moore et al., HPCA 2006 (Skim)		slides , six-per-page
9	Wed	4-Mar	Dataflow Architectures	Veen, ACM Computing Surveys 1986 (Read), Papadopoulos, ISCA 1990 (Read)		slides , six-per-page
10	Mon	9-Mar	Examples for Research Multiprocessors	Sankaralingam et al., ISCA 2003 (Skim), Swanson et al., Micro 2003 (Skim), Taylor et al., IEEE Micro 2002 (Skim), Khailany et al., IEEE Micro 2001 (Skim)		slides , six-per-page , TRIPS talk from project website, RAW talk in Hotchips 2001
10	Wed	11-Mar	Project Presentations		Project Due
11	Mon	16-Mar	Final Exam 7:30-9:20 PM
12	Mon	25-Mar	No Class		Grades Out

Homeworks and Projects

Project submission instructions : Due Mar 11 at 7 PM.
Review Guidelines: Paper review guidelines and submission instructions.
Homework 1: Due Jan 12.
Homework 2: Due Feb 2nd. Submission Instructions.
Project ideas and instructions posted. Note: You'll need a username (your last name in lowercase) and a password (the first six digits of your PSU ID) to access this page.
Guidelines on running long simulation jobs

Exams and Grades

Reading List

(Please Respect the IEEE and ACM Copyrights)

Introduction to Parallel Computing, Lawrence Livermore National Laboratory Tutorial.
Kunle Olukotun et al., "The Case for a Single-Chip Multiprocessor," ASPLOS 1996.
Deborah T. Marr et al., "Hyper-Threading Technology Architecture and Microarchitecture," Intel Technology Journal, 2001.
Alaa Alameldeen and David Wood, "IPC Considered Harmful for Microprocessor Workloads," IEEE Micro, 2006.
Edward Gehringer et al., "A Survey of Commercial Parallel Processors," ACM Computer Architecture News, 1988.
Per Stenstrom, "A Survey of Cache Coherence Schemes for Multiprocessors," IEEE Computer, 1990.
Daniel Lenoski et al., "The Directory-based Cache Coherence Protocol for the DASH Multiprocessor," ISCA 1990.
James Laudon and Daniel Lenoski, "The SGI Origin: A ccNUMA Highly Scalable Server," ISCA 1997.
Charles Seitz, "The Cosmic Cube," CACM 1985.
Lawrence Livermore Natianal Lab MPI Tutorial.
Erik Hagersten et al., "DDM - A Cache-Only Memory Architecture," IEEE Computer, 1992.
Babak Falsafi and David Wood, "Reactive NUMA: A Design for Unifying S-COMA and CC-NUMA," ISCA 1997.
Sarita Adve and Kourosh Gharachorloo, "Shared Memory Consistency Models: A Tutorial," Rice University Tech. Report, 1995.
Lionel Ni and Philip McKinley, "A Survey of Wormhole Routing Techniques in Direct Networks," IEEE Computer, 1993.
Richard Russell, "The CRAY-1 Computer System," Communications of the ACM, 1978.
Steven Scott, "Synchronization and Communication in the T3E Multiprocessor," ASPLOS, 1996.
J. Tendler et al., "Power4 System Microarchitecture," IBM Journal of Research and Development, 2002.
B. Sinharoy et al., "Power5 System Microarchitecture," IBM Journal of Research and Development, 2005.
Thomas Anderson, "The Performance of Spin-Lock Alternatives," IEEE Trans. Parallel and Distributed Systems, 1990.
John Mellor-Crummey and Michael Scott, "Synchronization Without Contention," ACM Trans. Computer Systems, 1991.
Ravi Rajwar and James Goodman, "Speculative Lock Elision: Enabling Highly-Concurrent Multithreaded Execution," MICRO, 2001.
Maurice Herlihy and Eliot Moss, "Transactional Memory: Architectural Support for Lock-Free Data Structures," ISCA, 1993.
Kevin Moore et al., "LogTM: Log-based Transactional Memory," HPCA, 2006.
Arthur Veen, "Dataflow Machine Architecture," ACM Computing Surveys, 1986.
Gregory Papadopoulos and David Culler, "Monsoon: An Explicit Token-Store Architecture," ISCA, 1990.
Karthikeyan Sankaralingam et al., "Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture," ISCA, 2003.
Steven Swanson et al., "Wavescalar," MICRO, 2003.
Michael Taylor et al., "The Raw Microprocessor: A Computational Fabric for Software Circuits and General Purpose Programs," IEEE Micro, 2002.
Brucek Khailany et al., "Imagine: Media Processing with Streams," IEEE Micro, 2001.

Useful Links

Previous ECE 588/688 offering from Dr. Haitham Akkary, Winter 2008
Previous ECE 587/687 offering, Fall 2008
WWW Computer Architecture Webpage
Writer's Handbook: Writing guidelines from the University of Wisconsin-Madison's Writing Center.
Oral Presentation Advice from Prof. Mark Hill

Last Modified Mon Mar 23 23:59:12 PST 2009 by Alaa R. Alameldeen